Lines Matching +full:convert +full:- +full:channels
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <Michael.Hennerich@analog.com>
11 - Nuno Sá <nuno.sa@analog.com>
14 A family of similar multi-channel analog to digital converters with SPI bus.
21 $ref: /schemas/spi/spi-peripheral-props.yaml#
26 - adi,ad4695
27 - adi,ad4696
28 - adi,ad4697
29 - adi,ad4698
34 spi-max-frequency:
37 spi-cpol: true
38 spi-cpha: true
40 spi-rx-bus-width:
44 avdd-supply:
47 vio-supply:
50 ldo-in-supply:
51 description: Internal LDO Input. Mutually exclusive with vdd-supply.
53 vdd-supply:
54 description: Core power supply. Mutually exclusive with ldo-in-supply.
56 ref-supply:
58 External reference voltage. Mutually exclusive with refin-supply.
60 refin-supply:
62 Internal reference buffer input. Mutually exclusive with ref-supply.
64 com-supply:
65 description: Common voltage supply for pseudo-differential analog inputs.
67 adi,no-ref-current-limit:
73 adi,no-ref-high-z:
76 Enable this flag if the ref-supply requires Reference Input High-Z Mode
79 cnv-gpios:
80 description: The Convert Input (CNV). If omitted, CNV is tied to SPI CS.
83 reset-gpios:
90 - description: Signal coming from the BSY_ALT_GP0 pin (ALERT or BUSY).
91 - description: Signal coming from the GP2 pin (ALERT).
92 - description: Signal coming from the GP3 pin (BUSY).
94 interrupt-names:
97 - const: gp0
98 - const: gp2
99 - const: gp3
101 gpio-controller: true
103 "#gpio-cells":
109 "#address-cells":
112 "#size-cells":
116 "^in(?:[13579]|1[135])-supply$":
118 Optional voltage supply for odd numbered channels when they are used as
119 the negative input for a pseudo-differential channel.
121 "^channel@[0-9a-f]$":
133 common-mode-channel:
135 Describes the common mode channel for single channels. 0xFF is REFGND
137 dt-bindings/iio/adi,ad4695.h. Values 1 to 15 correspond to INx inputs.
138 Only odd numbered INx inputs can be used as common mode channels.
142 adi,no-high-z:
145 Enable this flag if the input pin requires the Analog Input High-Z
149 - reg
153 - if:
155 common-mode-channel:
162 - compatible
163 - reg
164 - avdd-supply
165 - vio-supply
168 - oneOf:
169 - required:
170 - ldo-in-supply
171 - required:
172 - vdd-supply
174 - oneOf:
175 - required:
176 - ref-supply
177 - required:
178 - refin-supply
180 # the internal reference buffer always requires high-z mode
181 - if:
183 - refin-supply
186 adi,no-ref-high-z: false
188 # limit channels for 8-channel chips
189 - if:
194 - adi,ad4697
195 - adi,ad4698
198 "^in(?:9|1[135])-supply$": false
199 "^channel@[0-7]$":
203 common-mode-channel:
205 "^channel@[8-9a-f]$": false
210 - |
211 #include <dt-bindings/gpio/gpio.h>
212 #include <dt-bindings/iio/adi,ad4695.h>
215 #address-cells = <1>;
216 #size-cells = <0>;
221 spi-cpol;
222 spi-cpha;
223 spi-max-frequency = <80000000>;
224 avdd-supply = <&power_supply>;
225 ldo-in-supply = <&power_supply>;
226 vio-supply = <&io_supply>;
227 refin-supply = <&supply_5V>;
228 com-supply = <&supply_2V5>;
229 in3-supply = <&supply_2V5>;
230 reset-gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
232 #address-cells = <1>;
233 #size-cells = <0>;
235 /* Pseudo-differential channel between IN0 and REFGND. */
240 /* Pseudo-differential channel between IN1 and COM. */
243 common-mode-channel = <AD4695_COMMON_MODE_COM>;
247 /* Pseudo-differential channel between IN2 and IN3. */
250 common-mode-channel = <3>;