Lines Matching +full:common +full:- +full:mode +full:- +full:channel

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <Michael.Hennerich@analog.com>
11 - Nuno Sá <nuno.sa@analog.com>
14 A family of similar multi-channel analog to digital converters with SPI bus.
21 $ref: /schemas/spi/spi-peripheral-props.yaml#
26 - adi,ad4695
27 - adi,ad4696
28 - adi,ad4697
29 - adi,ad4698
34 spi-max-frequency:
37 spi-cpol: true
38 spi-cpha: true
40 spi-rx-bus-width:
44 avdd-supply:
47 vio-supply:
50 ldo-in-supply:
51 description: Internal LDO Input. Mutually exclusive with vdd-supply.
53 vdd-supply:
54 description: Core power supply. Mutually exclusive with ldo-in-supply.
56 ref-supply:
58 External reference voltage. Mutually exclusive with refin-supply.
60 refin-supply:
62 Internal reference buffer input. Mutually exclusive with ref-supply.
64 com-supply:
65 description: Common voltage supply for pseudo-differential analog inputs.
67 adi,no-ref-current-limit:
73 adi,no-ref-high-z:
76 Enable this flag if the ref-supply requires Reference Input High-Z Mode
79 cnv-gpios:
83 reset-gpios:
94 - description: Signal coming from the BSY_ALT_GP0 pin (ALERT or BUSY).
95 - description: Signal coming from the GP2 pin (ALERT).
96 - description: Signal coming from the GP3 pin (BUSY).
98 interrupt-names:
101 - const: gp0
102 - const: gp2
103 - const: gp3
105 gpio-controller: true
107 "#gpio-cells":
113 '#trigger-source-cells':
119 dt-bindings/iio/adc/adi,ad4695.h.
122 "#address-cells":
125 "#size-cells":
129 "^in(?:[13579]|1[135])-supply$":
132 the negative input for a pseudo-differential channel.
134 "^channel@[0-9a-f]$":
139 Describes each individual channel. In addition the properties defined
146 common-mode-channel:
148 Describes the common mode channel for single channels. 0xFF is REFGND
150 dt-bindings/iio/adc/adi,ad4695.h. Values 1 to 15 correspond to INx
151 inputs. Only odd numbered INx inputs can be used as common mode
156 adi,no-high-z:
159 Enable this flag if the input pin requires the Analog Input High-Z
160 Mode to be disabled for proper operation.
163 - reg
166 # bipolar mode can't be used with REFGND
167 - if:
169 common-mode-channel:
176 - compatible
177 - reg
178 - avdd-supply
179 - vio-supply
182 - oneOf:
183 - required:
184 - ldo-in-supply
185 - required:
186 - vdd-supply
188 - oneOf:
189 - required:
190 - ref-supply
191 - required:
192 - refin-supply
194 # the internal reference buffer always requires high-z mode
195 - if:
197 - refin-supply
200 adi,no-ref-high-z: false
202 # limit channels for 8-channel chips
203 - if:
208 - adi,ad4697
209 - adi,ad4698
212 "^in(?:9|1[135])-supply$": false
213 "^channel@[0-7]$":
217 common-mode-channel:
219 "^channel@[8-9a-f]$": false
224 - |
225 #include <dt-bindings/gpio/gpio.h>
226 #include <dt-bindings/iio/adc/adi,ad4695.h>
229 #address-cells = <1>;
230 #size-cells = <0>;
235 spi-cpol;
236 spi-cpha;
237 spi-max-frequency = <80000000>;
238 avdd-supply = <&power_supply>;
239 ldo-in-supply = <&power_supply>;
240 vio-supply = <&io_supply>;
241 refin-supply = <&supply_5V>;
242 com-supply = <&supply_2V5>;
243 in3-supply = <&supply_2V5>;
244 reset-gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
246 #address-cells = <1>;
247 #size-cells = <0>;
249 /* Pseudo-differential channel between IN0 and REFGND. */
250 channel@0 {
254 /* Pseudo-differential channel between IN1 and COM. */
255 channel@1 {
257 common-mode-channel = <AD4695_COMMON_MODE_COM>;
261 /* Pseudo-differential channel between IN2 and IN3. */
262 channel@2 {
264 common-mode-channel = <3>;