Lines Matching +full:gpio +full:- +full:pin +full:- +full:ic
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/nxp,pcf8575.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: PCF857x-compatible I/O expanders
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
13 The PCF857x-compatible chips have "quasi-bidirectional" I/O lines that can be
14 driven high by a pull-up current source or driven low to ground. This
25 - maxim,max7328
26 - maxim,max7329
27 - nxp,pca8574
28 - nxp,pca8575
29 - nxp,pca9670
30 - nxp,pca9671
31 - nxp,pca9672
32 - nxp,pca9673
33 - nxp,pca9674
34 - nxp,pca9675
35 - nxp,pcf8574
36 - nxp,pcf8574a
37 - nxp,pcf8575
42 gpio-line-names:
46 gpio-controller: true
48 '#gpio-cells':
51 The first cell is the GPIO number and the second cell specifies GPIO
52 flags, as defined in <dt-bindings/gpio/gpio.h>. Only the GPIO_ACTIVE_HIGH
55 lines-initial-states:
60 the input (pulled-up) state.
62 low-level output state.
69 interrupt-controller: true
71 '#interrupt-cells':
74 wakeup-source: true
76 reset-gpios:
79 GPIO controlling the (reset active LOW) RESET# pin.
81 The active polarity of the GPIO must translate to the low state of the
82 RESET# pin on the IC, i.e. if a GPIO is directly routed to the RESET# pin
85 Performing a reset makes all lines initialized to their input (pulled-up)
89 - if:
95 - nxp,pca9670
96 - nxp,pca9671
97 - nxp,pca9672
98 - nxp,pca9673
101 reset-gpios: false
103 # lines-initial-states XOR reset-gpios
105 # may not match passed lines-initial-states
106 - if:
108 - lines-initial-states
111 reset-gpios: false
114 "^(.+-hog(-[0-9]+)?)$":
118 - gpio-hog
121 - compatible
122 - reg
123 - gpio-controller
124 - '#gpio-cells'
129 - |
131 #address-cells = <1>;
132 #size-cells = <0>;
134 gpio@20 {
137 interrupt-parent = <&irqpin2>;
139 gpio-controller;
140 #gpio-cells = <2>;
141 interrupt-controller;
142 #interrupt-cells = <2>;