Lines Matching +full:xlnx +full:- +full:zynqmp +full:- +full:dpdma

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/xilinx/xlnx,zynqmp-dpdma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx ZynqMP DisplayPort DMA Controller
10   These bindings describe the DMA engine included in the Xilinx ZynqMP
16   - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
19   - $ref: ../dma-controller.yaml#
22   "#dma-cells":
25       The cell is the DMA channel ID (see dt-bindings/dma/xlnx-zynqmp-dpdma.h
29     const: xlnx,zynqmp-dpdma
41   clock-names:
44   power-domains:
48   - "#dma-cells"
49   - compatible
50   - reg
51   - interrupts
52   - clocks
53   - clock-names
54   - power-domains
59   - |
60     #include <dt-bindings/interrupt-controller/arm-gic.h>
61     #include <dt-bindings/power/xlnx-zynqmp-power.h>
63     dma: dma-controller@fd4c0000 {
64       compatible = "xlnx,zynqmp-dpdma";
67       interrupt-parent = <&gic>;
69       clock-names = "axi_clk";
70       #dma-cells = <1>;
71       power-domains = <&zynqmp_firmware PD_DP>;