Lines Matching +full:mipi +full:- +full:calibrate
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-dsi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
16 - enum:
17 - nvidia,tegra20-dsi
18 - nvidia,tegra30-dsi
19 - nvidia,tegra114-dsi
20 - nvidia,tegra124-dsi
21 - nvidia,tegra210-dsi
22 - nvidia,tegra186-dsi
24 - items:
25 - const: nvidia,tegra132-dsi
26 - const: nvidia,tegra124-dsi
38 clock-names:
44 - description: module reset
46 reset-names:
48 - const: dsi
50 operating-points-v2: true
52 power-domains:
55 avdd-dsi-csi-supply:
58 nvidia,mipi-calibrate:
61 calibrated. See nvidia,tegra114-mipi.yaml for details.
62 $ref: /schemas/types.yaml#/definitions/phandle-array
64 nvidia,ddc-i2c-bus:
69 nvidia,hpd-gpio:
75 $ref: /schemas/types.yaml#/definitions/uint8-array
81 nvidia,ganged-mode:
87 - $ref: ../dsi-controller.yaml#
88 - if:
93 - nvidia,tegra20-dsi
94 - nvidia,tegra30-dsi
99 - description: DSI module clock
100 - description: input for the pixel clock
102 clock-names:
104 - const: dsi
105 - const: parent
110 - description: DSI module clock
111 - description: low-power module clock
112 - description: input for the pixel clock
114 clock-names:
116 - const: dsi
117 - const: lp
118 - const: parent
120 - if:
124 const: nvidia,tegra186-dsi
127 - interrupts
132 - compatible
133 - reg
134 - clocks
135 - clock-names
136 - resets
137 - reset-names
140 - |
141 #include <dt-bindings/clock/tegra186-clock.h>
142 #include <dt-bindings/interrupt-controller/arm-gic.h>
143 #include <dt-bindings/power/tegra186-powergate.h>
144 #include <dt-bindings/reset/tegra186-reset.h>
147 compatible = "nvidia,tegra186-dsi";
153 clock-names = "dsi", "lp", "parent";
155 reset-names = "dsi";
157 power-domains = <&bpmp TEGRA186_POWER_DOMAIN_DISP>;