Lines Matching +full:io +full:- +full:channel +full:- +full:mux
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra124-dpaux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 pins which can be assigned to either the DPAUX channel or to an I2C
20 AUX channel.
24 pattern: "^dpaux@[0-9a-f]+$"
28 - enum:
29 - nvidia,tegra124-dpaux
30 - nvidia,tegra210-dpaux
31 - nvidia,tegra186-dpaux
32 - nvidia,tegra194-dpaux
34 - items:
35 - const: nvidia,tegra132-dpaux
36 - const: nvidia,tegra124-dpaux
46 - description: clock input for the DPAUX hardware
47 - description: reference clock
49 clock-names:
51 - const: dpaux
52 - const: parent
56 - description: module reset
58 reset-names:
60 - const: dpaux
62 power-domains:
65 i2c-bus:
72 aux-bus:
73 $ref: /schemas/display/dp-aux-bus.yaml#
75 vdd-supply:
80 "^pinmux-[a-z0-9]+$":
83 nodes are needed to describe the pin mux'ing options for the
91 const: dpaux-io
95 - aux
96 - i2c
97 - off
102 - groups
103 - function
108 - compatible
109 - reg
110 - interrupts
111 - clocks
112 - clock-names
113 - resets
114 - reset-names
117 - |
118 #include <dt-bindings/clock/tegra210-car.h>
119 #include <dt-bindings/interrupt-controller/arm-gic.h>
122 compatible = "nvidia,tegra210-dpaux";
127 clock-names = "dpaux", "parent";
129 reset-names = "dpaux";
130 power-domains = <&pd_sor>;
132 state_dpaux_aux: pinmux-aux {
133 groups = "dpaux-io";
137 state_dpaux_i2c: pinmux-i2c {
138 groups = "dpaux-io";
142 state_dpaux_off: pinmux-off {
143 groups = "dpaux-io";
147 i2c-bus {
148 #address-cells = <1>;
149 #size-cells = <0>;