Lines Matching +full:clock +full:- +full:names
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car Display Unit (DU)
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
13 These DT bindings describe the Display Unit embedded in the Renesas R-Car
14 Gen1, R-Car Gen2, R-Car Gen3, RZ/G1 and RZ/G2 SoCs.
19 - renesas,du-r8a7742 # for RZ/G1H compatible DU
20 - renesas,du-r8a7743 # for RZ/G1M compatible DU
21 - renesas,du-r8a7744 # for RZ/G1N compatible DU
22 - renesas,du-r8a7745 # for RZ/G1E compatible DU
23 - renesas,du-r8a77470 # for RZ/G1C compatible DU
24 - renesas,du-r8a774a1 # for RZ/G2M compatible DU
25 - renesas,du-r8a774b1 # for RZ/G2N compatible DU
26 - renesas,du-r8a774c0 # for RZ/G2E compatible DU
27 - renesas,du-r8a774e1 # for RZ/G2H compatible DU
28 - renesas,du-r8a7779 # for R-Car H1 compatible DU
29 - renesas,du-r8a7790 # for R-Car H2 compatible DU
30 - renesas,du-r8a7791 # for R-Car M2-W compatible DU
31 - renesas,du-r8a7792 # for R-Car V2H compatible DU
32 - renesas,du-r8a7793 # for R-Car M2-N compatible DU
33 - renesas,du-r8a7794 # for R-Car E2 compatible DU
34 - renesas,du-r8a7795 # for R-Car H3 compatible DU
35 - renesas,du-r8a7796 # for R-Car M3-W compatible DU
36 - renesas,du-r8a77961 # for R-Car M3-W+ compatible DU
37 - renesas,du-r8a77965 # for R-Car M3-N compatible DU
38 - renesas,du-r8a77970 # for R-Car V3M compatible DU
39 - renesas,du-r8a77980 # for R-Car V3H compatible DU
40 - renesas,du-r8a77990 # for R-Car E3 compatible DU
41 - renesas,du-r8a77995 # for R-Car D3 compatible DU
42 - renesas,du-r8a779a0 # for R-Car V3U compatible DU
43 - renesas,du-r8a779g0 # for R-Car V4H compatible DU
44 - renesas,du-r8a779h0 # for R-Car V4M compatible DU
49 # See compatible-specific constraints below.
54 clock-names:
67 reset-names:
71 power-domains:
79 The number of ports and their assignment are model-dependent. Each port
83 "^port@[0-3]$":
90 $ref: /schemas/types.yaml#/definitions/phandle-array
100 $ref: /schemas/types.yaml#/definitions/phandle-array
105 - description: phandle to VSP instance that serves the DU channel
106 - description: Channel index identifying the LIF instance in that VSP
112 - compatible
113 - reg
114 - clocks
115 - interrupts
116 - ports
119 - if:
123 const: renesas,du-r8a7779
129 - description: Functional clock
130 - description: DU_DOTCLKIN0 input clock
131 - description: DU_DOTCLKIN1 input clock
133 clock-names:
136 - const: du.0
137 - pattern: '^dclkin\.[01]$'
138 - pattern: '^dclkin\.[01]$'
157 - port@0
158 - port@1
161 - interrupts
163 - if:
168 - renesas,du-r8a7743
169 - renesas,du-r8a7744
170 - renesas,du-r8a7791
171 - renesas,du-r8a7793
177 - description: Functional clock for DU0
178 - description: Functional clock for DU1
179 - description: DU_DOTCLKIN0 input clock
180 - description: DU_DOTCLKIN1 input clock
182 clock-names:
185 - const: du.0
186 - const: du.1
187 - pattern: '^dclkin\.[01]$'
188 - pattern: '^dclkin\.[01]$'
197 reset-names:
199 - const: du.0
212 - port@0
213 - port@1
216 - clock-names
217 - interrupts
218 - resets
219 - reset-names
221 - if:
226 - renesas,du-r8a7745
227 - renesas,du-r8a7792
233 - description: Functional clock for DU0
234 - description: Functional clock for DU1
235 - description: DU_DOTCLKIN0 input clock
236 - description: DU_DOTCLKIN1 input clock
238 clock-names:
241 - const: du.0
242 - const: du.1
243 - pattern: '^dclkin\.[01]$'
244 - pattern: '^dclkin\.[01]$'
253 reset-names:
255 - const: du.0
267 - port@0
268 - port@1
271 - clock-names
272 - interrupts
273 - resets
274 - reset-names
276 - if:
281 - renesas,du-r8a7794
287 - description: Functional clock for DU0
288 - description: Functional clock for DU1
289 - description: DU_DOTCLKIN0 input clock
290 - description: DU_DOTCLKIN1 input clock
292 clock-names:
295 - const: du.0
296 - const: du.1
297 - pattern: '^dclkin\.[01]$'
298 - pattern: '^dclkin\.[01]$'
307 reset-names:
309 - const: du.0
322 - port@0
323 - port@1
326 - clock-names
327 - interrupts
328 - resets
329 - reset-names
331 - if:
336 - renesas,du-r8a77470
342 - description: Functional clock for DU0
343 - description: Functional clock for DU1
344 - description: DU_DOTCLKIN0 input clock
345 - description: DU_DOTCLKIN1 input clock
347 clock-names:
350 - const: du.0
351 - const: du.1
352 - pattern: '^dclkin\.[01]$'
353 - pattern: '^dclkin\.[01]$'
362 reset-names:
364 - const: du.0
378 - port@0
379 - port@1
380 - port@2
383 - clock-names
384 - interrupts
385 - resets
386 - reset-names
388 - if:
393 - renesas,du-r8a7742
394 - renesas,du-r8a7790
400 - description: Functional clock for DU0
401 - description: Functional clock for DU1
402 - description: Functional clock for DU2
403 - description: DU_DOTCLKIN0 input clock
404 - description: DU_DOTCLKIN1 input clock
405 - description: DU_DOTCLKIN2 input clock
407 clock-names:
410 - const: du.0
411 - const: du.1
412 - const: du.2
413 - pattern: '^dclkin\.[012]$'
414 - pattern: '^dclkin\.[012]$'
415 - pattern: '^dclkin\.[012]$'
424 reset-names:
426 - const: du.0
440 - port@0
441 - port@1
442 - port@2
445 - clock-names
446 - interrupts
447 - resets
448 - reset-names
450 - if:
455 - renesas,du-r8a7795
461 - description: Functional clock for DU0
462 - description: Functional clock for DU1
463 - description: Functional clock for DU2
464 - description: Functional clock for DU4
465 - description: DU_DOTCLKIN0 input clock
466 - description: DU_DOTCLKIN1 input clock
467 - description: DU_DOTCLKIN2 input clock
468 - description: DU_DOTCLKIN3 input clock
470 clock-names:
473 - const: du.0
474 - const: du.1
475 - const: du.2
476 - const: du.3
477 - pattern: '^dclkin\.[0123]$'
478 - pattern: '^dclkin\.[0123]$'
479 - pattern: '^dclkin\.[0123]$'
480 - pattern: '^dclkin\.[0123]$'
490 reset-names:
492 - const: du.0
493 - const: du.2
507 - port@0
508 - port@1
509 - port@2
510 - port@3
521 - clock-names
522 - interrupts
523 - resets
524 - reset-names
525 - renesas,vsps
527 - if:
532 - renesas,du-r8a774a1
533 - renesas,du-r8a7796
534 - renesas,du-r8a77961
540 - description: Functional clock for DU0
541 - description: Functional clock for DU1
542 - description: Functional clock for DU2
543 - description: DU_DOTCLKIN0 input clock
544 - description: DU_DOTCLKIN1 input clock
545 - description: DU_DOTCLKIN2 input clock
547 clock-names:
550 - const: du.0
551 - const: du.1
552 - const: du.2
553 - pattern: '^dclkin\.[012]$'
554 - pattern: '^dclkin\.[012]$'
555 - pattern: '^dclkin\.[012]$'
565 reset-names:
567 - const: du.0
568 - const: du.2
581 - port@0
582 - port@1
583 - port@2
594 - clock-names
595 - interrupts
596 - resets
597 - reset-names
598 - renesas,vsps
600 - if:
605 - renesas,du-r8a774b1
606 - renesas,du-r8a774e1
607 - renesas,du-r8a77965
613 - description: Functional clock for DU0
614 - description: Functional clock for DU1
615 - description: Functional clock for DU3
616 - description: DU_DOTCLKIN0 input clock
617 - description: DU_DOTCLKIN1 input clock
618 - description: DU_DOTCLKIN3 input clock
620 clock-names:
623 - const: du.0
624 - const: du.1
625 - const: du.3
626 - pattern: '^dclkin\.[013]$'
627 - pattern: '^dclkin\.[013]$'
628 - pattern: '^dclkin\.[013]$'
638 reset-names:
640 - const: du.0
641 - const: du.3
654 - port@0
655 - port@1
656 - port@2
667 - clock-names
668 - interrupts
669 - resets
670 - reset-names
671 - renesas,vsps
673 - if:
678 - renesas,du-r8a77970
679 - renesas,du-r8a77980
685 - description: Functional clock for DU0
686 - description: DU_DOTCLKIN0 input clock
688 clock-names:
691 - const: du.0
692 - const: dclkin.0
700 reset-names:
702 - const: du.0
714 - port@0
715 - port@1
721 - clock-names
722 - interrupts
723 - resets
724 - reset-names
725 - renesas,vsps
727 - if:
732 - renesas,du-r8a774c0
733 - renesas,du-r8a77990
734 - renesas,du-r8a77995
740 - description: Functional clock for DU0
741 - description: Functional clock for DU1
742 - description: DU_DOTCLKIN0 input clock
743 - description: DU_DOTCLKIN1 input clock
745 clock-names:
748 - const: du.0
749 - const: du.1
750 - pattern: '^dclkin\.[01]$'
751 - pattern: '^dclkin\.[01]$'
760 reset-names:
762 - const: du.0
776 - port@0
777 - port@1
778 - port@2
789 - clock-names
790 - interrupts
791 - resets
792 - reset-names
793 - renesas,vsps
795 - if:
800 - renesas,du-r8a779a0
801 - renesas,du-r8a779g0
806 - description: Functional clock
808 clock-names:
810 - const: du.0
818 reset-names:
820 - const: du.0
832 - port@0
833 - port@1
840 - clock-names
841 - interrupts
842 - resets
843 - reset-names
844 - renesas,vsps
846 - if:
851 - renesas,du-r8a779h0
856 - description: Functional clock
858 clock-names:
860 - const: du.0
868 reset-names:
870 - const: du.0
881 - port@0
887 - clock-names
888 - interrupts
889 - resets
890 - reset-names
891 - renesas,vsps
896 # R-Car H3 ES2.0 DU
897 - |
898 #include <dt-bindings/clock/renesas-cpg-mssr.h>
899 #include <dt-bindings/interrupt-controller/arm-gic.h>
902 compatible = "renesas,du-r8a7795";
912 clock-names = "du.0", "du.1", "du.2", "du.3";
914 reset-names = "du.0", "du.2";
920 #address-cells = <1>;
921 #size-cells = <0>;
926 remote-endpoint = <&adv7123_in>;
932 remote-endpoint = <&dw_hdmi0_in>;
938 remote-endpoint = <&dw_hdmi1_in>;
944 remote-endpoint = <&lvds0_in>;