Lines Matching +full:required +full:- +full:opps
1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sm8650-mdss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Neil Armstrong <neil.armstrong@linaro.org>
13 SM8650 MSM Mobile Display Subsystem(MDSS), which encapsulates sub-blocks like
16 $ref: /schemas/display/msm/mdss-common.yaml#
20 const: qcom,sm8650-mdss
24 - description: Display AHB
25 - description: Display hf AXI
26 - description: Display core
33 - description: Interconnect path from mdp0 port to the data bus
34 - description: Interconnect path from CPU to the reg bus
36 interconnect-names:
38 - const: mdp0-mem
39 - const: cpu-cfg
42 "^display-controller@[0-9a-f]+$":
47 const: qcom,sm8650-dpu
49 "^displayport-controller@[0-9a-f]+$":
54 const: qcom,sm8650-dp
56 "^dsi@[0-9a-f]+$":
62 - const: qcom,sm8650-dsi-ctrl
63 - const: qcom,mdss-dsi-ctrl
65 "^phy@[0-9a-f]+$":
70 const: qcom,sm8650-dsi-phy-4nm
72 required:
73 - compatible
78 - |
79 #include <dt-bindings/clock/qcom,rpmh.h>
80 #include <dt-bindings/interrupt-controller/arm-gic.h>
81 #include <dt-bindings/power/qcom,rpmhpd.h>
82 #include <dt-bindings/interconnect/qcom,sm8650-rpmh.h>
84 display-subsystem@ae00000 {
85 compatible = "qcom,sm8650-mdss";
87 reg-names = "mdss";
91 interconnect-names = "mdp0-mem", "cpu-cfg";
95 power-domains = <&dispcc_gdsc>;
100 clock-names = "bus", "nrt_bus", "core";
103 interrupt-controller;
104 #interrupt-cells = <1>;
108 #address-cells = <1>;
109 #size-cells = <1>;
112 display-controller@ae01000 {
113 compatible = "qcom,sm8650-dpu";
116 reg-names = "mdp", "vbif";
123 clock-names = "nrt_bus",
129 assigned-clocks = <&dispcc_mdp_vsync_clk>;
130 assigned-clock-rates = <19200000>;
132 operating-points-v2 = <&mdp_opp_table>;
133 power-domains = <&rpmhpd RPMHPD_MMCX>;
135 interrupt-parent = <&mdss>;
139 #address-cells = <1>;
140 #size-cells = <0>;
145 remote-endpoint = <&dsi0_in>;
152 remote-endpoint = <&dsi1_in>;
157 mdp_opp_table: opp-table {
158 compatible = "operating-points-v2";
160 opp-200000000 {
161 opp-hz = /bits/ 64 <200000000>;
162 required-opps = <&rpmhpd_opp_low_svs>;
165 opp-325000000 {
166 opp-hz = /bits/ 64 <325000000>;
167 required-opps = <&rpmhpd_opp_svs>;
170 opp-375000000 {
171 opp-hz = /bits/ 64 <375000000>;
172 required-opps = <&rpmhpd_opp_svs_l1>;
175 opp-514000000 {
176 opp-hz = /bits/ 64 <514000000>;
177 required-opps = <&rpmhpd_opp_nom>;
183 compatible = "qcom,sm8650-dsi-ctrl", "qcom,mdss-dsi-ctrl";
185 reg-names = "dsi_ctrl";
187 interrupt-parent = <&mdss>;
196 clock-names = "byte",
203 assigned-clocks = <&dispcc_byte_clk>,
205 assigned-clock-parents = <&dsi0_phy 0>, <&dsi0_phy 1>;
207 operating-points-v2 = <&dsi_opp_table>;
208 power-domains = <&rpmhpd RPMHPD_MMCX>;
211 phy-names = "dsi";
213 #address-cells = <1>;
214 #size-cells = <0>;
217 #address-cells = <1>;
218 #size-cells = <0>;
223 remote-endpoint = <&dpu_intf1_out>;
234 dsi_opp_table: opp-table {
235 compatible = "operating-points-v2";
237 opp-187500000 {
238 opp-hz = /bits/ 64 <187500000>;
239 required-opps = <&rpmhpd_opp_low_svs>;
242 opp-300000000 {
243 opp-hz = /bits/ 64 <300000000>;
244 required-opps = <&rpmhpd_opp_svs>;
247 opp-358000000 {
248 opp-hz = /bits/ 64 <358000000>;
249 required-opps = <&rpmhpd_opp_svs_l1>;
255 compatible = "qcom,sm8650-dsi-phy-4nm";
259 reg-names = "dsi_phy",
263 #clock-cells = <1>;
264 #phy-cells = <0>;
268 clock-names = "iface", "ref";
272 compatible = "qcom,sm8650-dsi-ctrl", "qcom,mdss-dsi-ctrl";
274 reg-names = "dsi_ctrl";
276 interrupt-parent = <&mdss>;
285 clock-names = "byte",
292 assigned-clocks = <&dispcc_byte_clk>,
294 assigned-clock-parents = <&dsi1_phy 0>, <&dsi1_phy 1>;
296 operating-points-v2 = <&dsi_opp_table>;
297 power-domains = <&rpmhpd RPMHPD_MMCX>;
300 phy-names = "dsi";
302 #address-cells = <1>;
303 #size-cells = <0>;
306 #address-cells = <1>;
307 #size-cells = <0>;
312 remote-endpoint = <&dpu_intf2_out>;
325 compatible = "qcom,sm8650-dsi-phy-4nm";
329 reg-names = "dsi_phy",
333 #clock-cells = <1>;
334 #phy-cells = <0>;
338 clock-names = "iface", "ref";