Lines Matching +full:dsi +full:- +full:controller
1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sdm670-mdss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Richard Acayan <mailingradian@gmail.com>
13 SDM670 MSM Mobile Display Subsystem (MDSS), which encapsulates sub-blocks
14 like DPU display controller, DSI and DP interfaces etc.
16 $ref: /schemas/display/msm/mdss-common.yaml#
20 const: qcom,sdm670-mdss
24 - description: Display AHB clock from gcc
25 - description: Display core clock
27 clock-names:
29 - const: iface
30 - const: core
38 interconnect-names:
42 "^display-controller@[0-9a-f]+$":
48 const: qcom,sdm670-dpu
50 "^displayport-controller@[0-9a-f]+$":
56 const: qcom,sdm670-dp
58 "^dsi@[0-9a-f]+$":
65 const: qcom,sdm670-dsi-ctrl
67 "^phy@[0-9a-f]+$":
73 const: qcom,dsi-phy-10nm
76 - compatible
81 - |
82 #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
83 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
84 #include <dt-bindings/clock/qcom,rpmh.h>
85 #include <dt-bindings/interconnect/qcom,sdm670-rpmh.h>
86 #include <dt-bindings/interrupt-controller/arm-gic.h>
87 #include <dt-bindings/power/qcom-rpmpd.h>
89 display-subsystem@ae00000 {
90 compatible = "qcom,sdm670-mdss";
92 reg-names = "mdss";
93 power-domains = <&dispcc MDSS_GDSC>;
97 clock-names = "iface", "core";
100 interrupt-controller;
101 #interrupt-cells = <1>;
105 interconnect-names = "mdp0-mem", "mdp1-mem";
110 #address-cells = <1>;
111 #size-cells = <1>;
114 display-controller@ae01000 {
115 compatible = "qcom,sdm670-dpu";
118 reg-names = "mdp", "vbif";
125 clock-names = "gcc-bus", "iface", "bus", "core", "vsync";
127 interrupt-parent = <&mdss>;
129 power-domains = <&rpmhpd SDM670_CX>;
130 operating-points-v2 = <&mdp_opp_table>;
133 #address-cells = <1>;
134 #size-cells = <0>;
139 remote-endpoint = <&mdss_dsi0_in>;
146 remote-endpoint = <&mdss_dsi1_in>;
152 dsi@ae94000 {
153 compatible = "qcom,sdm670-dsi-ctrl", "qcom,mdss-dsi-ctrl";
155 reg-names = "dsi_ctrl";
157 interrupt-parent = <&mdss>;
166 clock-names = "byte",
172 assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>,
174 assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>;
176 operating-points-v2 = <&dsi_opp_table>;
177 power-domains = <&rpmhpd SDM670_CX>;
180 phy-names = "dsi";
182 #address-cells = <1>;
183 #size-cells = <0>;
186 #address-cells = <1>;
187 #size-cells = <0>;
192 remote-endpoint = <&dpu_intf1_out>;
205 compatible = "qcom,dsi-phy-10nm";
209 reg-names = "dsi_phy",
213 #clock-cells = <1>;
214 #phy-cells = <0>;
218 clock-names = "iface", "ref";
219 vdds-supply = <&vreg_dsi_phy>;
222 dsi@ae96000 {
223 compatible = "qcom,sdm670-dsi-ctrl", "qcom,mdss-dsi-ctrl";
225 reg-names = "dsi_ctrl";
227 interrupt-parent = <&mdss>;
236 clock-names = "byte",
242 assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>,
244 assigned-clock-parents = <&dsi1_phy 0>, <&dsi1_phy 1>;
246 operating-points-v2 = <&dsi_opp_table>;
247 power-domains = <&rpmhpd SDM670_CX>;
250 phy-names = "dsi";
252 #address-cells = <1>;
253 #size-cells = <0>;
256 #address-cells = <1>;
257 #size-cells = <0>;
262 remote-endpoint = <&dpu_intf2_out>;
275 compatible = "qcom,dsi-phy-10nm";
279 reg-names = "dsi_phy",
283 #clock-cells = <1>;
284 #phy-cells = <0>;
288 clock-names = "iface", "ref";
289 vdds-supply = <&vreg_dsi_phy>;