Lines Matching +full:gcc +full:- +full:msm8917
1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
15 - Rob Clark <robdclark@gmail.com>
20 - const: qcom,mdp5
22 - items:
23 - enum:
24 - qcom,apq8084-mdp5
25 - qcom,msm8226-mdp5
26 - qcom,msm8916-mdp5
27 - qcom,msm8917-mdp5
28 - qcom,msm8937-mdp5
29 - qcom,msm8953-mdp5
30 - qcom,msm8974-mdp5
31 - qcom,msm8976-mdp5
32 - qcom,msm8994-mdp5
33 - qcom,msm8996-mdp5
34 - qcom,sdm630-mdp5
35 - qcom,sdm660-mdp5
36 - const: qcom,mdp5
39 pattern: '^display-controller@[0-9a-f]+$'
44 reg-names:
46 - const: mdp_phys
55 clock-names:
57 - minItems: 4
59 - const: iface
60 - const: bus
61 - const: core
62 - const: vsync
63 - const: lut
64 - const: tbu
65 - const: tbu_rt
67 - items:
68 - const: iface
69 - const: bus
70 - const: core
71 - const: iommu
72 - const: vsync
77 - description: Interconnect path from mdp0 (or a single mdp) port to the data bus
78 - description: Interconnect path from mdp1 port to the data bus
79 - description: Interconnect path from rotator port to the data bus
81 interconnect-names:
84 - const: mdp0-mem
85 - const: mdp1-mem
86 - const: rotator-mem
90 - description: apps SMMU with the Stream-ID mask for Hard-Fail port0
92 power-domains:
95 operating-points-v2: true
96 opp-table:
108 "^port@[0-3]+$":
113 - port@0
116 - compatible
117 - reg
118 - reg-names
119 - clocks
120 - clock-names
121 - ports
126 - |
127 #include <dt-bindings/clock/qcom,gcc-msm8916.h>
128 #include <dt-bindings/interrupt-controller/arm-gic.h>
129 display-controller@1a01000 {
132 reg-names = "mdp_phys";
134 interrupt-parent = <&mdss>;
137 clocks = <&gcc GCC_MDSS_AHB_CLK>,
138 <&gcc GCC_MDSS_AXI_CLK>,
139 <&gcc GCC_MDSS_MDP_CLK>,
140 <&gcc GCC_MDSS_VSYNC_CLK>;
141 clock-names = "iface",
147 #address-cells = <1>;
148 #size-cells = <0>;
153 remote-endpoint = <&dsi0_in>;