Lines Matching +full:display +full:- +full:subsystem
1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/mdss-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Display MDSS common properties
10 - Krishna Manikandan <quic_mkrishn@quicinc.com>
11 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
12 - Rob Clark <robdclark@gmail.com>
15 Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
16 sub-blocks like DPU display controller, DSI and DP interfaces etc.
25 pattern: "^display-subsystem@[0-9a-f]+$"
30 reg-names:
33 power-domains:
40 clock-names:
47 interrupt-controller: true
49 "#address-cells": true
51 "#size-cells": true
53 "#interrupt-cells":
59 - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0
60 - description: Phandle to apps_smmu node with SID mask for Hard-Fail port1
65 # the entries like we do with interconnect-names
69 - description: Interconnect path from mdp0 (or a single mdp) port to the data bus
70 - description: Interconnect path from mdp1 port to the data bus
71 - description: Interconnect path from CPU to the reg bus
73 interconnect-names:
75 - minItems: 1
77 - const: mdp0-mem
78 - const: cpu-cfg
80 - minItems: 2
82 - const: mdp0-mem
83 - const: mdp1-mem
84 - const: cpu-cfg
88 - description: MDSS_CORE reset
90 memory-region:
97 - reg
98 - reg-names
99 - power-domains
100 - clocks
101 - interrupts
102 - interrupt-controller
103 - iommus
104 - ranges