Lines Matching +full:displayport +full:- +full:controller
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek DPI and DP_INTF Controller
10 - CK Hu <ck.hu@mediatek.com>
11 - Jitao shi <jitao.shi@mediatek.com>
15 subsystem and provides 8-bit RGB/YUV444 or 8/10/10-bit YUV422 pixel data on a
21 - enum:
22 - mediatek,mt2701-dpi
23 - mediatek,mt7623-dpi
24 - mediatek,mt8173-dpi
25 - mediatek,mt8183-dpi
26 - mediatek,mt8186-dpi
27 - mediatek,mt8188-dp-intf
28 - mediatek,mt8192-dpi
29 - mediatek,mt8195-dp-intf
30 - mediatek,mt8195-dpi
31 - items:
32 - enum:
33 - mediatek,mt6795-dpi
34 - const: mediatek,mt8183-dpi
35 - items:
36 - enum:
37 - mediatek,mt8365-dpi
38 - const: mediatek,mt8192-dpi
39 - items:
40 - enum:
41 - mediatek,mt8188-dpi
42 - const: mediatek,mt8195-dpi
52 - description: Pixel Clock
53 - description: Engine Clock
54 - description: DPI PLL
56 clock-names:
58 - const: pixel
59 - const: engine
60 - const: pll
62 pinctrl-0: true
63 pinctrl-1: true
65 pinctrl-names:
67 - const: default
68 - const: sleep
70 power-domains:
87 attached HDMI, LVDS or DisplayPort encoder chip.
99 description: DPI output to an HDMI, LVDS or DisplayPort encoder input
102 - port@0
103 - port@1
106 - compatible
107 - reg
108 - interrupts
109 - clocks
110 - clock-names
113 - required:
114 - port
115 - required:
116 - ports
121 - |
122 #include <dt-bindings/interrupt-controller/arm-gic.h>
123 #include <dt-bindings/clock/mt8173-clk.h>
124 #include <dt-bindings/power/mt8173-power.h>
127 compatible = "mediatek,mt8173-dpi";
130 power-domains = <&spm MT8173_POWER_DOMAIN_MM>;
134 clock-names = "pixel", "engine", "pll";
135 pinctrl-names = "default", "sleep";
136 pinctrl-0 = <&dpi_pin_func>;
137 pinctrl-1 = <&dpi_pin_idle>;
141 remote-endpoint = <&hdmi0_in>;