Lines Matching +full:hdmi +full:- +full:tx
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/imx/fsl,imx8mp-hdmi-pvi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX8MP HDMI Parallel Video Interface
10 - Lucas Stach <l.stach@pengutronix.de>
13 The HDMI parallel video interface is a timing and sync generator block in the
14 i.MX8MP SoC, that sits between the video source and the HDMI TX controller.
18 const: fsl,imx8mp-hdmi-pvi
26 power-domains:
39 description: Output to the HDMI TX controller.
42 - port@0
43 - port@1
46 - compatible
47 - reg
48 - interrupts
49 - power-domains
50 - ports
55 - |
56 #include <dt-bindings/interrupt-controller/irq.h>
57 #include <dt-bindings/power/imx8mp-power.h>
59 display-bridge@32fc4000 {
60 compatible = "fsl,imx8mp-hdmi-pvi";
62 interrupt-parent = <&irqsteer_hdmi>;
64 power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_PVI>;
67 #address-cells = <1>;
68 #size-cells = <0>;
73 remote-endpoint = <&lcdif3_to_pvi>;
80 remote-endpoint = <&hdmi_tx_from_pvi>;