Lines Matching +full:port +full:- +full:specific

1 Device-Tree bindings for DesignWare DSI Host Controller v1.20a driver
7 - compatible: value should be "hisilicon,hi6220-dsi".
8 - reg: physical base address and length of dsi controller's registers.
9 - clocks: contains APB clock phandle + clock-specifier pair.
10 - clock-names: should be "pclk".
11 - ports: contains DSI controller input and output sub port.
12   The input port connects to ADE output port with the reg value "0".
13   The output port with the reg value "1", it could connect to panel or
17 A example of HiKey board hi6220 SoC and board specific DT entry:
20 SoC specific:
22 		compatible = "hisilicon,hi6220-dsi";
25 		clock-names = "pclk";
29 			#address-cells = <1>;
30 			#size-cells = <0>;
32 			/* 0 for input port */
33 			port@0 {
36 					remote-endpoint = <&ade_out>;
43 Board specific:
48 			/* 1 for output port */
49 			port@1 {
53 					remote-endpoint = <&adv7533_in>;
65 			port {
67 					remote-endpoint = <&dsi_out0>;