Lines Matching +full:axi +full:- +full:ports

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Biju Das <biju.das.jz@bp.renesas.com>
18 - $ref: /schemas/display/dsi-controller.yaml#
23 - enum:
24 - renesas,r9a07g044-mipi-dsi # RZ/G2{L,LC}
25 - renesas,r9a07g054-mipi-dsi # RZ/V2L
26 - const: renesas,rzg2l-mipi-dsi
33 - description: Sequence operation channel 0 interrupt
34 - description: Sequence operation channel 1 interrupt
35 - description: Video-Input operation channel 1 interrupt
36 - description: DSI Packet Receive interrupt
37 - description: DSI Fatal Error interrupt
38 - description: DSI D-PHY PPI interrupt
39 - description: Debug interrupt
41 interrupt-names:
43 - const: seq0
44 - const: seq1
45 - const: vin1
46 - const: rcv
47 - const: ferr
48 - const: ppi
49 - const: debug
53 - description: DSI D-PHY PLL multiplied clock
54 - description: DSI D-PHY system clock
55 - description: DSI AXI bus clock
56 - description: DSI Register access clock
57 - description: DSI Video clock
58 - description: DSI D-PHY Escape mode transmit clock
60 clock-names:
62 - const: pllclk
63 - const: sysclk
64 - const: aclk
65 - const: pclk
66 - const: vclk
67 - const: lpclk
71 - description: MIPI_DSI_CMN_RSTB
72 - description: MIPI_DSI_ARESET_N
73 - description: MIPI_DSI_PRESET_N
75 reset-names:
77 - const: rst
78 - const: arst
79 - const: prst
81 power-domains:
84 ports:
85 $ref: /schemas/graph.yaml#/properties/ports
93 $ref: /schemas/graph.yaml#/$defs/port-base
99 $ref: /schemas/media/video-interfaces.yaml#
103 data-lanes:
107 - const: 1
108 - const: 2
109 - const: 3
110 - const: 4
113 - data-lanes
116 - port@0
117 - port@1
120 - compatible
121 - reg
122 - interrupts
123 - interrupt-names
124 - clocks
125 - clock-names
126 - resets
127 - reset-names
128 - power-domains
129 - ports
134 - |
135 #include <dt-bindings/clock/r9a07g044-cpg.h>
136 #include <dt-bindings/interrupt-controller/arm-gic.h>
139 compatible = "renesas,r9a07g044-mipi-dsi", "renesas,rzg2l-mipi-dsi";
148 interrupt-names = "seq0", "seq1", "vin1", "rcv",
156 clock-names = "pllclk", "sysclk", "aclk", "pclk", "vclk", "lpclk";
160 reset-names = "rst", "arst", "prst";
161 power-domains = <&cpg>;
163 ports {
164 #address-cells = <1>;
165 #size-cells = <0>;
170 remote-endpoint = <&du_out_dsi0>;
177 data-lanes = <1 2 3 4>;
178 remote-endpoint = <&adv7535_in>;