Lines Matching +full:dphy +full:- +full:ref
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/nwl-dsi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Northwest Logic MIPI-DSI controller on i.MX SoCs
10 - Guido Gúnther <agx@sigxcpu.org>
11 - Robert Chiras <robert.chiras@nxp.com>
14 NWL MIPI-DSI host controller found on i.MX8 platforms. This is a dsi bridge for
15 the SOCs NWL MIPI-DSI host controller.
18 - $ref: ../dsi-controller.yaml#
22 const: fsl,imx8mq-nwl-dsi
30 '#address-cells':
33 '#size-cells':
36 assigned-clock-parents: true
37 assigned-clock-rates: true
38 assigned-clocks: true
42 - description: DSI core clock
43 - description: RX_ESC clock (used in escape mode)
44 - description: TX_ESC clock (used in escape mode)
45 - description: PHY_REF clock
46 - description: LCDIF clock
48 clock-names:
50 - const: core
51 - const: rx_esc
52 - const: tx_esc
53 - const: phy_ref
54 - const: lcdif
56 mux-controls:
63 A phandle to the phy module representing the DPHY
65 phy-names:
67 - const: dphy
69 power-domains:
74 - description: dsi byte reset line
75 - description: dsi dpi reset line
76 - description: dsi esc reset line
77 - description: dsi pclk reset line
79 reset-names:
81 - const: byte
82 - const: dpi
83 - const: esc
84 - const: pclk
87 $ref: /schemas/graph.yaml#/properties/ports
91 $ref: /schemas/graph.yaml#/$defs/port-base
98 $ref: /schemas/graph.yaml#/properties/endpoint
99 description: sub-node describing the input from LCDIF
102 $ref: /schemas/graph.yaml#/properties/endpoint
103 description: sub-node describing the input from DCSS
106 - required:
107 - endpoint@0
108 - required:
109 - endpoint@1
114 $ref: /schemas/graph.yaml#/$defs/port-base
122 $ref: /schemas/media/video-interfaces.yaml#
126 data-lanes:
130 - const: 1
131 - const: 2
132 - const: 3
133 - const: 4
136 - port@0
137 - port@1
140 - '#address-cells'
141 - '#size-cells'
142 - clock-names
143 - clocks
144 - compatible
145 - interrupts
146 - mux-controls
147 - phy-names
148 - phys
149 - ports
150 - reg
151 - reset-names
152 - resets
157 - |
158 #include <dt-bindings/clock/imx8mq-clock.h>
159 #include <dt-bindings/gpio/gpio.h>
160 #include <dt-bindings/interrupt-controller/arm-gic.h>
161 #include <dt-bindings/reset/imx8mq-reset.h>
164 #address-cells = <1>;
165 #size-cells = <0>;
166 compatible = "fsl,imx8mq-nwl-dsi";
173 clock-names = "core", "rx_esc", "tx_esc", "phy_ref", "lcdif";
175 mux-controls = <&mux 0>;
176 power-domains = <&pgc_mipi>;
181 reset-names = "byte", "dpi", "esc", "pclk";
182 phys = <&dphy>;
183 phy-names = "dphy";
188 vcc-supply = <®_2v8_p>;
189 iovcc-supply = <®_1v8_p>;
190 reset-gpios = <&gpio3 13 GPIO_ACTIVE_LOW>;
193 remote-endpoint = <&mipi_dsi_out>;
199 #address-cells = <1>;
200 #size-cells = <0>;
203 #size-cells = <0>;
204 #address-cells = <1>;
208 remote-endpoint = <&lcdif_mipi_dsi>;
214 remote-endpoint = <&panel_in>;