Lines Matching +full:tegra30 +full:- +full:emc

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/devfreq/nvidia,tegra30-actmon.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra30 Activity Monitor
10   - Dmitry Osipenko <digetx@gmail.com>
11   - Jon Hunter <jonathanh@nvidia.com>
12   - Thierry Reding <thierry.reding@gmail.com>
23       - nvidia,tegra30-actmon
24       - nvidia,tegra114-actmon
25       - nvidia,tegra124-actmon
26       - nvidia,tegra210-actmon
34   clock-names:
36       - const: actmon
37       - const: emc
42   reset-names:
44       - const: actmon
53   interconnect-names:
61   operating-points-v2:
63       Should contain freqs and voltages and opp-supported-hw property, which
66   "#cooling-cells":
70   - compatible
71   - reg
72   - clocks
73   - clock-names
74   - resets
75   - reset-names
76   - interrupts
77   - interconnects
78   - interconnect-names
79   - operating-points-v2
80   - "#cooling-cells"
85   - |
86     #include <dt-bindings/memory/tegra30-mc.h>
88     mc: memory-controller@7000f000 {
89         compatible = "nvidia,tegra30-mc";
92         clock-names = "mc";
96         #iommu-cells = <1>;
97         #reset-cells = <1>;
98         #interconnect-cells = <1>;
101     emc: external-memory-controller@7000f400 {
102         compatible = "nvidia,tegra30-emc";
107         nvidia,memory-controller = <&mc>;
108         operating-points-v2 = <&dvfs_opp_table>;
109         power-domains = <&domain>;
111         #interconnect-cells = <0>;
115         compatible = "nvidia,tegra30-actmon";
119         clock-names = "actmon", "emc";
121         reset-names = "actmon";
122         operating-points-v2 = <&dvfs_opp_table>;
123         interconnects = <&mc TEGRA30_MC_MPCORER &emc>;
124         interconnect-names = "cpu-read";
125         #cooling-cells = <2>;