Lines Matching +full:rtic +full:- +full:region
1 # SPDX-License-Identifier: GPL-2.0
2 # Copyright (C) 2008-2011 Freescale Semiconductor Inc.
4 ---
5 $id: http://devicetree.org/schemas/crypto/fsl,sec-v4.0.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - '"Horia Geantă" <horia.geanta@nxp.com>'
12 - Pankaj Gupta <pankaj.gupta@nxp.com>
13 - Gaurav Jain <gaurav.jain@nxp.com>
25 HW interface between QM & SEC 4 and also BM & SEC 4, on DPAA-enabled parts
40 - items:
41 - const: fsl,sec-v5.4
42 - const: fsl,sec-v5.0
43 - const: fsl,sec-v4.0
44 - items:
45 - enum:
46 - fsl,imx6ul-caam
47 - fsl,sec-v5.0
48 - const: fsl,sec-v4.0
49 - const: fsl,sec-v4.0
57 '#address-cells':
60 '#size-cells':
67 clock-names:
73 dma-coherent: true
78 fsl,sec-era:
83 '^jr@[0-9a-f]+$':
96 - items:
97 - const: fsl,sec-v5.4-job-ring
98 - const: fsl,sec-v5.0-job-ring
99 - const: fsl,sec-v4.0-job-ring
100 - items:
101 - const: fsl,sec-v5.0-job-ring
102 - const: fsl,sec-v4.0-job-ring
103 - const: fsl,sec-v4.0-job-ring
113 Specifies the LIODN to be used in conjunction with the ppid-to-liodn
117 $ref: /schemas/types.yaml#/definitions/uint32-array
119 - maximum: 0xfff
121 '^rtic@[0-9a-f]+$':
125 Run Time Integrity Check (RTIC) Node. Defines a register space that
134 - items:
135 - const: fsl,sec-v5.4-rtic
136 - const: fsl,sec-v5.0-rtic
137 - const: fsl,sec-v4.0-rtic
138 - const: fsl,sec-v4.0-rtic
142 - description: RTIC control and status register space.
143 - description: RTIC recoverable error indication register space.
152 '#address-cells':
155 '#size-cells':
159 '^rtic-[a-z]@[0-9a-f]+$':
163 Run Time Integrity Check (RTIC) Memory Node defines individual RTIC
164 memory regions that are used to perform run-time integrity check of
172 - items:
173 - const: fsl,sec-v5.4-rtic-memory
174 - const: fsl,sec-v5.0-rtic-memory
175 - const: fsl,sec-v4.0-rtic-memory
176 - const: fsl,sec-v4.0-rtic-memory
180 - description: RTIC memory address
181 - description: RTIC hash result
186 ppid-to-liodn table that specifies the PPID to LIODN mapping.
190 $ref: /schemas/types.yaml#/definitions/uint32-array
192 - maximum: 0xfff
194 fsl,rtic-region:
196 Specifies the HW address (36 bit address) for this region
200 $ref: /schemas/types.yaml#/definitions/uint32-array
203 - compatible
204 - reg
205 - ranges
210 - |
212 compatible = "fsl,sec-v4.0";
213 #address-cells = <1>;
214 #size-cells = <1>;
220 compatible = "fsl,sec-v4.0-job-ring";
226 compatible = "fsl,sec-v4.0-job-ring";
232 compatible = "fsl,sec-v4.0-job-ring";
238 compatible = "fsl,sec-v4.0-job-ring";
243 rtic@6000 {
244 compatible = "fsl,sec-v4.0-rtic";
245 #address-cells = <1>;
246 #size-cells = <1>;
250 rtic-a@0 {
251 compatible = "fsl,sec-v4.0-rtic-memory";
255 rtic-b@20 {
256 compatible = "fsl,sec-v4.0-rtic-memory";
260 rtic-c@40 {
261 compatible = "fsl,sec-v4.0-rtic-memory";
265 rtic-d@60 {
266 compatible = "fsl,sec-v4.0-rtic-memory";