Lines Matching +full:mux +full:- +full:clock

1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/clock/ti/ti,mux-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Texas Instruments mux clock
10   - Tero Kristo <kristo@kernel.org>
13   This clock assumes a register-mapped multiplexer with multiple inpt clock
14   signals or parents, one of which can be selected as output. This clock does
24   register value   selected parent clock
29   Some clock controller IPs do not allow a value of zero to be programmed
31   "index-starts-at-one" modified the scheme as follows:
33   register value   selected clock parent
38   The binding must provide the register to control the mux. Optionally
46       - ti,mux-clock
47       - ti,composite-mux-clock
49   "#clock-cells":
54   clock-output-names:
60   ti,bit-shift:
63       Number of bits to shift the bit-mask
67   ti,index-starts-at-one:
72   ti,set-rate-parent:
75       clk_set_rate is propagated to parent clock,
76       not supported by the composite-mux-clock subtype.
78   ti,latch-bit:
81       Latch the mux value to HW, only needed if the register
90         const: ti,composite-mux-clock
93     ti,set-rate-parent: false
96   - compatible
97   - "#clock-cells"
98   - clocks
99   - reg
104   - |
106       #address-cells = <1>;
107       #size-cells = <0>;
109       clock-controller@110 {
110         compatible = "ti,mux-clock";
112         #clock-cells = <0>;
114         ti,index-starts-at-one;
115         ti,set-rate-parent;
118       clock-controller@120 {
119         compatible = "ti,composite-mux-clock";
121         #clock-cells = <0>;
123         ti,bit-shift = <4>;