Lines Matching full:silabs

4 $id: http://devicetree.org/schemas/clock/silabs,si5351.yaml#
24       - silabs,si5351a      # Si5351A, 20-QFN package
25       - silabs,si5351a-msop # Si5351A, 10-MSOP package
26       - silabs,si5351b      # Si5351B, 20-QFN package
27       - silabs,si5351c      # Si5351C, 20-QFN package
53   silabs,pll-source:
65   silabs,pll-reset-mode:
80             In mode 1, the PLL is only reset if the silabs,pll-reset is
98       silabs,clock-source:
109       silabs,drive-strength:
114       silabs,multisynth-source:
120       silabs,pll-master:
126       silabs,pll-reset:
130       silabs,disable-state:
146                 const: silabs,si5351a-msop
160                 const: silabs,si5351c
163             silabs,clock-source:
167             silabs,clock-source:
179               - silabs,si5351a
180               - silabs,si5351a-msop
181               - silabs,si5351b
206         compatible = "silabs,si5351a-msop";
217         silabs,pll-source = <0 0>, <1 0>;
220         silabs,pll-reset-mode = <1 1>;
232           silabs,drive-strength = <8>;
233           silabs,multisynth-source = <0>;
234           silabs,clock-source = <0>;
235           silabs,pll-master;
249           silabs,drive-strength = <4>;
250           silabs,multisynth-source = <1>;
251           silabs,clock-source = <0>;
252           silabs,pll-master;
253           silabs,pll-reset;
262           silabs,clock-source = <2>;