Lines Matching +full:dt +full:- +full:schema

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sm8450-gpucc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Konrad Dybcio <konradybcio@kernel.org>
17     include/dt-bindings/clock/qcom,sar2130p-gpucc.h
18     include/dt-bindings/clock/qcom,sm4450-gpucc.h
19     include/dt-bindings/clock/qcom,sm8450-gpucc.h
20     include/dt-bindings/clock/qcom,sm8550-gpucc.h
21     include/dt-bindings/reset/qcom,sm8450-gpucc.h
22     include/dt-bindings/reset/qcom,sm8650-gpucc.h
23     include/dt-bindings/reset/qcom,x1e80100-gpucc.h
28       - qcom,sar2130p-gpucc
29       - qcom,sm4450-gpucc
30       - qcom,sm8450-gpucc
31       - qcom,sm8475-gpucc
32       - qcom,sm8550-gpucc
33       - qcom,sm8650-gpucc
34       - qcom,x1e80100-gpucc
38       - description: Board XO source
39       - description: GPLL0 main branch source
40       - description: GPLL0 div branch source
43   - compatible
44   - clocks
45   - '#power-domain-cells'
48   - $ref: qcom,gcc.yaml#
53   - |
54     #include <dt-bindings/clock/qcom,gcc-sm8450.h>
55     #include <dt-bindings/clock/qcom,rpmh.h>
58         #address-cells = <2>;
59         #size-cells = <2>;
61         clock-controller@3d90000 {
62             compatible = "qcom,sm8450-gpucc";
67             #clock-cells = <1>;
68             #reset-cells = <1>;
69             #power-domain-cells = <1>;