Lines Matching +full:dispcc +full:- +full:sdm845
1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sdm845-dispcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Display Clock & Reset Controller on SDM845
10 - Taniya Das <quic_tdas@quicinc.com>
14 domains on SDM845.
16 See also:: include/dt-bindings/clock/qcom,dispcc-sdm845.h
20 const: qcom,sdm845-dispcc
22 # NOTE: sdm845.dtsi existed for quite some time and specified no clocks.
27 - description: Board XO source
28 - description: GPLL0 source from GCC
29 - description: GPLL0 div source from GCC
30 - description: Byte clock from DSI PHY0
31 - description: Pixel clock from DSI PHY0
32 - description: Byte clock from DSI PHY1
33 - description: Pixel clock from DSI PHY1
34 - description: Link clock from DP PHY
35 - description: VCO DIV clock from DP PHY
37 clock-names:
39 - const: bi_tcxo
40 - const: gcc_disp_gpll0_clk_src
41 - const: gcc_disp_gpll0_div_clk_src
42 - const: dsi0_phy_pll_out_byteclk
43 - const: dsi0_phy_pll_out_dsiclk
44 - const: dsi1_phy_pll_out_byteclk
45 - const: dsi1_phy_pll_out_dsiclk
46 - const: dp_link_clk_divsel_ten
47 - const: dp_vco_divided_clk_src_mux
50 - compatible
51 - clocks
52 - clock-names
53 - '#power-domain-cells'
56 - $ref: qcom,gcc.yaml#
61 - |
62 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
63 #include <dt-bindings/clock/qcom,rpmh.h>
64 clock-controller@af00000 {
65 compatible = "qcom,sdm845-dispcc";
76 clock-names = "bi_tcxo",
85 #clock-cells = <1>;
86 #reset-cells = <1>;
87 #power-domain-cells = <1>;