Lines Matching +full:ipq5332 +full:- +full:gcc

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,ipq5332-gcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Global Clock & Reset Controller on IPQ5332 and IPQ5424
10   - Bjorn Andersson <andersson@kernel.org>
14   domains on IPQ5332 and IPQ5424.
17     include/dt-bindings/clock/qcom,gcc-ipq5332.h
18     include/dt-bindings/clock/qcom,gcc-ipq5424.h
23       - qcom,ipq5332-gcc
24       - qcom,ipq5424-gcc
29       - description: Board XO clock source
30       - description: Sleep clock source
31       - description: PCIE 2lane PHY pipe clock source
32       - description: PCIE 2lane x1 PHY pipe clock source (For second lane)
33       - description: USB PCIE wrapper pipe clock source
34       - description: PCIE 2-lane PHY2 pipe clock source
35       - description: PCIE 2-lane PHY3 pipe clock source
37   '#power-domain-cells': false
38   '#interconnect-cells':
42   - compatible
43   - clocks
46   - $ref: qcom,gcc.yaml#
47   - if:
51             const: qcom,ipq5332-gcc
57   - if:
61             const: qcom,ipq5424-gcc
71   - |
72     clock-controller@1800000 {
73       compatible = "qcom,ipq5332-gcc";
80       #clock-cells = <1>;
81       #reset-cells = <1>;