Lines Matching +full:sm8350 +full:- +full:rpmhpd

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,dispcc-sm8x50.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Display Clock & Reset Controller on SM8150/SM8250/SM8350
10   - Jonathan Marek <jonathan@marek.ca>
14   domains on SM8150/SM8250/SM8350.
17     include/dt-bindings/clock/qcom,dispcc-sm8150.h
18     include/dt-bindings/clock/qcom,dispcc-sm8250.h
19     include/dt-bindings/clock/qcom,dispcc-sm8350.h
24       - qcom,sc8180x-dispcc
25       - qcom,sm8150-dispcc
26       - qcom,sm8250-dispcc
27       - qcom,sm8350-dispcc
32       - description: Board XO source
33       - description: Byte clock from DSI PHY0
34       - description: Pixel clock from DSI PHY0
35       - description: Byte clock from DSI PHY1
36       - description: Pixel clock from DSI PHY1
37       - description: Link clock from DP PHY
38       - description: VCO DIV clock from DP PHY
39       - description: Link clock from eDP PHY
40       - description: VCO DIV clock from eDP PHY
41       - description: Link clock from DP1 PHY
42       - description: VCO DIV clock from DP1 PHY
43       - description: Link clock from DP2 PHY
44       - description: VCO DIV clock from DP2 PHY
46   clock-names:
49       - const: bi_tcxo
50       - const: dsi0_phy_pll_out_byteclk
51       - const: dsi0_phy_pll_out_dsiclk
52       - const: dsi1_phy_pll_out_byteclk
53       - const: dsi1_phy_pll_out_dsiclk
54       - const: dp_phy_pll_link_clk
55       - const: dp_phy_pll_vco_div_clk
56       - const: edp_phy_pll_link_clk
57       - const: edp_phy_pll_vco_div_clk
58       - const: dptx1_phy_pll_link_clk
59       - const: dptx1_phy_pll_vco_div_clk
60       - const: dptx2_phy_pll_link_clk
61       - const: dptx2_phy_pll_vco_div_clk
63   power-domains:
68   required-opps:
74   - compatible
75   - clocks
76   - clock-names
77   - '#power-domain-cells'
80   - $ref: qcom,gcc.yaml#
81   - if:
86               const: qcom,sc8180x-dispcc
91         clock-names:
97   - |
98     #include <dt-bindings/clock/qcom,rpmh.h>
99     #include <dt-bindings/power/qcom,rpmhpd.h>
100     clock-controller@af00000 {
101       compatible = "qcom,sm8250-dispcc";
110       clock-names = "bi_tcxo",
117       #clock-cells = <1>;
118       #reset-cells = <1>;
119       #power-domain-cells = <1>;
120       power-domains = <&rpmhpd RPMHPD_MMCX>;
121       required-opps = <&rpmhpd_opp_low_svs>;