Lines Matching +full:composite +full:- +full:divider +full:- +full:clock

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/fsl,sai-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale SAI bitclock-as-a-clock
10   - Michael Walle <michael@walle.cc>
13   It is possible to use the BCLK pin of a SAI module as a generic clock
18   clock of the second SAI as a MCLK clock for an audio codec, for example.
20   This is a composite of a gated clock and a divider clock.
24     const: fsl,vf610-sai-clock
32   '#clock-cells':
36   - compatible
37   - reg
38   - clocks
39   - '#clock-cells'
44   - |
46         #address-cells = <2>;
47         #size-cells = <2>;
49         mclk: clock-mclk@f130080 {
50             compatible = "fsl,vf610-sai-clock";
52             #clock-cells = <0>;