Lines Matching +full:0 +full:xe1000

88         0  sysclk          must be 0
91         3  fman            0 for fm1, 1 for fm2
94         5  coreclk         must be 0
116   '^mux[0-9]@[a-f0-9]+$':
124   '^pll[0-9]@[a-f0-9]+$':
144         reg = <0xe1000 0x1000>;
153         reg = <0xe1000 0x1000>;
154         ranges = <0x0 0xe1000 0x1000>;
163             #clock-cells = <0>;
168             reg = <0x800 0x4>;
176             reg = <0x820 0x4>;
182         mux0: mux0@0 {
184             reg = <0x0 0x4>;
185             #clock-cells = <0>;
186             clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
193             reg = <0x20 0x4>;
194             #clock-cells = <0>;
195             clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
202             reg = <0xc00 0x4>;