Lines Matching +full:soc +full:- +full:internal
6 - compatible: Should be set to one of the following:
7 marvell,armada370-mbus
8 marvell,armadaxp-mbus
9 marvell,armada375-mbus
10 marvell,armada380-mbus
11 marvell,kirkwood-mbus
12 marvell,dove-mbus
13 marvell,orion5x-88f5281-mbus
14 marvell,orion5x-88f5182-mbus
15 marvell,orion5x-88f5181-mbus
16 marvell,orion5x-88f6183-mbus
17 marvell,mv78xx0-mbus
19 - address-cells: Must be '2'. The first cell for the MBus ID encoding,
22 - size-cells: Must be '1'.
24 - ranges: Must be set up to provide a proper translation for each child.
27 - controller: Contains a single phandle referring to the MBus controller
30 within the internal register window (see below).
34 - pcie-mem-aperture: This optional property contains the aperture for
40 - pcie-io-aperture: Just as explained for the above property, this
48 - compatible: Should be set to "marvell,mbus-controller".
50 - reg: Device's register space.
55 marvell,armada370-mbus and marvell,armadaxp-mbus
60 soc {
61 compatible = "marvell,armada370-mbus", "simple-bus";
62 #address-cells = <2>;
63 #size-cells = <1>;
65 pcie-mem-aperture = <0xe0000000 0x8000000>;
66 pcie-io-aperture = <0xe8000000 0x100000>;
68 internal-regs {
69 compatible = "simple-bus";
71 mbusc: mbus-controller@20000 {
72 compatible = "marvell,mbus-controller";
84 In order to allow to describe valid and non-valid window entries, the
92 S = 0xf for a non-valid window (see below)
96 I = 4-bit window target ID
102 AA = 1 for internal register
109 soc {
110 compatible = "marvell,armada370-mbus", "simple-bus";
111 #address-cells = <2>;
112 #size-cells = <1>;
126 internal-regs {
127 compatible = "simple-bus";
130 mbusc: mbus-controller@20000 {
131 compatible = "marvell,mbus-controller";
151 soc {
152 compatible = "marvell,armada370-mbus", "simple-bus";
153 #address-cells = <2>;
154 #size-cells = <1>;
168 internal-regs {
169 compatible = "simple-bus";
170 #address-cells = <1>;
171 #size-cells = <1>;
174 mbusc: mbus-controller@20000 {
175 compatible = "marvell,mbus-controller";
198 The mbus-node ranges property defines a set of mbus windows that are expected
208 As a special case, the internal register window must be set up by the boot
216 soc {
217 compatible = "marvell,armadaxp-mbus", "simple-bus";
220 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000 /* internal-regs */
229 devbus-bootcs {
234 compatible = "cfi-flash";
236 bank-width = <2>;
240 pcie-controller {
241 compatible = "marvell,armada-xp-pcie";
244 #address-cells = <3>;
245 #size-cells = <2>;
262 internal-regs {
263 compatible = "simple-bus";
264 #address-cells = <1>;
265 #size-cells = <1>;
268 mbusc: mbus-controller@20000 {
272 interrupt-controller@20000 {