Lines Matching +full:pcie +full:- +full:phy2
1 * APM X-Gene 6.0 Gb/s SATA host controller nodes
3 SATA host controller nodes are defined to describe on-chip Serial ATA
7 - compatible : Shall contain:
8 * "apm,xgene-ahci"
9 - reg : First memory resource shall be the AHCI memory
19 - interrupts : Interrupt-specifier for SATA host controller IRQ.
20 - clocks : Reference to the clock entry.
21 - phys : A list of phandles + phy-specifiers, one for each
22 entry in phy-names.
23 - phy-names : Should contain:
24 * "sata-phy" for the SATA 6.0Gbps PHY
27 - dma-coherent : Present if dma operations are coherent
28 - status : Shall be "ok" if enabled or "disabled" if disabled.
33 compatible = "fixed-clock";
34 #clock-cells = <1>;
35 clock-frequency = <100000000>;
36 clock-output-names = "sataclk";
39 phy2: phy@1f22a000 {
40 compatible = "apm,xgene-phy";
42 #phy-cells = <1>;
46 compatible = "apm,xgene-phy";
48 #phy-cells = <1>;
52 compatible = "apm,xgene-ahci";
59 dma-coherent;
61 phys = <&phy2 0>;
62 phy-names = "sata-phy";
66 compatible = "apm,xgene-ahci-pcie";
73 dma-coherent;
76 phy-names = "sata-phy";