Lines Matching +full:tegra234 +full:- +full:cbb +full:- +full:fabric
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra234-cbb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra CBB 2.0
10 - Sumit Gupta <sumitg@nvidia.com>
13 The Control Backbone (CBB) is comprised of the physical path from an
14 initiator to a target's register configuration space. CBB 2.0 consists
15 of multiple sub-blocks connected to each other to create a topology.
16 The Tegra234 SoC has different fabrics based on CBB 2.0 architecture
18 "CBB central fabric".
20 In CBB 2.0, each initiator which can issue transactions connects to a
22 fabric. Each Root MN contains a Error Monitor (EM) which detects and
24 Notifier (EN) which is per fabric and presents a single interrupt from
25 fabric to the SoC interrupt controller.
27 The driver handles errors from CBB due to illegal register accesses
30 Description, MasterID, Fabric, SlaveID, Address, Cache, Protection,
41 pattern: "^[a-z]+-fabric@[0-9a-f]+$"
45 - nvidia,tegra234-aon-fabric
46 - nvidia,tegra234-bpmp-fabric
47 - nvidia,tegra234-cbb-fabric
48 - nvidia,tegra234-dce-fabric
49 - nvidia,tegra234-rce-fabric
50 - nvidia,tegra234-sce-fabric
57 - description: secure interrupt from error notifier
62 - compatible
63 - reg
64 - interrupts
67 - |
68 #include <dt-bindings/interrupt-controller/arm-gic.h>
70 cbb-fabric@1300000 {
71 compatible = "nvidia,tegra234-cbb-fabric";