Lines Matching +full:tegra +full:- +full:pmc
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra186-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra Power Management Controller (PMC)
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra186-pmc
17 - nvidia,tegra194-pmc
18 - nvidia,tegra234-pmc
24 reg-names:
27 - const: pmc
28 - const: wake
29 - const: aotag
30 - enum: [ scratch, misc ]
31 - const: misc
33 interrupt-controller: true
35 "#interrupt-cells":
40 nvidia,invert-interrupt:
45 - if:
49 const: nvidia,tegra186-pmc
54 reg-names:
59 - if:
63 const: nvidia,tegra194-pmc
68 reg-names:
71 - if:
75 const: nvidia,tegra234-pmc
78 reg-names:
83 "^[a-z0-9]+-[a-z0-9]+$":
88 These are pad configuration nodes. On Tegra SoCs a pad is a set of
90 attribute of the hardware. The PMC can be used to set pad power
98 which are placed under the pmc node and they are referred to by
101 Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
105 csia, csib, dsi, mipi-bias, pex-clk-bias, pex-clk3, pex-clk2,
106 pex-clk1, usb0, usb1, usb2, usb-bias, uart, audio, hsic, dbg,
107 hdmi-dp0, hdmi-dp1, pex-cntrl, sdmmc2-hv, sdmmc4, cam, dsib,
108 dsic, dsid, csic, csid, csie, dsif, spi, ufs, dmic-hv, edp,
109 sdmmc1-hv, sdmmc3-hv, conn, audio-hv, ao-hv
113 csia, csib, mipi-bias, pex-clk-bias, pex-clk3, pex-clk2,
114 pex-clk1, eqos, pex-clk-2-bias, pex-clk-2, dap3, dap5, uart,
115 pwr-ctl, soc-gpio53, audio, gp-pwm2, gp-pwm3, soc-gpio12,
116 soc-gpio13, soc-gpio10, uart4, uart5, dbg, hdmi-dp3, hdmi-dp2,
117 hdmi-dp0, hdmi-dp1, pex-cntrl, pex-ctl2, pex-l0-rst,
118 pex-l1-rst, sdmmc4, pex-l5-rst, cam, csic, csid, csie, csif,
119 spi, ufs, csig, csih, edp, sdmmc1-hv, sdmmc3-hv, conn,
120 audio-hv, ao-hv
128 low-power-enable:
132 low-power-disable:
136 power-source:
145 include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h
148 except for ao-hv. Following pads have software configurable
149 signaling voltages: sdmmc2-hv, dmic-hv, sdmmc1-hv, sdmmc3-hv,
150 audio-hv, ao-hv.
155 - pins
160 - compatible
161 - reg
162 - reg-names
167 interrupt-controller: ['#interrupt-cells']
168 "#interrupt-cells":
170 - interrupt-controller
173 - |
174 #include <dt-bindings/clock/tegra186-clock.h>
175 #include <dt-bindings/interrupt-controller/arm-gic.h>
176 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
177 #include <dt-bindings/memory/tegra186-mc.h>
178 #include <dt-bindings/reset/tegra186-reset.h>
180 pmc@c3600000 {
181 compatible = "nvidia,tegra186-pmc";
186 reg-names = "pmc", "wake", "aotag", "scratch";
187 nvidia,invert-interrupt;
189 sdmmc1_3v3: sdmmc1-3v3 {
190 pins = "sdmmc1-hv";
191 power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
194 sdmmc1_1v8: sdmmc1-1v8 {
195 pins = "sdmmc1-hv";
196 power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>;
201 compatible = "nvidia,tegra186-sdhci";
206 clock-names = "sdhci", "tmclk";
208 reset-names = "sdhci";
211 interconnect-names = "dma-mem", "write";
213 pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
214 pinctrl-0 = <&sdmmc1_3v3>;
215 pinctrl-1 = <&sdmmc1_1v8>;