Lines Matching +full:rxclk +full:- +full:pins
6 giving access to numerous features: clocks, pin-muxing and many other
11 - compatible: must be: "syscon", "simple-mfd";
12 - reg: register area of the CP110 system controller
18 -------
23 - a set of core clocks
24 - a set of gateable clocks
28 - The first cell must be 0 or 1. 0 for the core clocks and 1 for the
30 - The second cell identifies the particular core clock or gateable
34 - Core clocks
35 - 0 0 APLL
36 - 0 1 PPv2 core
37 - 0 2 EIP
38 - 0 3 Core
39 - 0 4 NAND core
40 - 0 5 SDIO core
41 - Gateable clocks
42 - 1 0 Audio
43 - 1 1 Comm Unit
44 - 1 2 NAND
45 - 1 3 PPv2
46 - 1 4 SDIO
47 - 1 5 MG Domain
48 - 1 6 MG Core
49 - 1 7 XOR1
50 - 1 8 XOR0
51 - 1 9 GOP DP
52 - 1 11 PCIe x1 0
53 - 1 12 PCIe x1 1
54 - 1 13 PCIe x4
55 - 1 14 PCIe / XOR
56 - 1 15 SATA
57 - 1 16 SATA USB
58 - 1 17 Main
59 - 1 18 SD/MMC/GOP
60 - 1 21 Slow IO (SPI, NOR, BootROM, I2C, UART)
61 - 1 22 USB3H0
62 - 1 23 USB3H1
63 - 1 24 USB3 Device
64 - 1 25 EIP150
65 - 1 26 EIP197
69 - compatible: must be:
70 "marvell,cp110-clock"
71 - #clock-cells: must be set to 2
74 --------
77 Documentation/devicetree/bindings/pinctrl/marvell,mvebu-pinctrl.txt.
81 - compatible: "marvell,armada-7k-pinctrl", "marvell,armada-8k-cpm-pinctrl",
82 "marvell,armada-8k-cps-pinctrl" or "marvell,cp115-standalone-pinctrl"
85 Available mpp pins/groups and functions:
89 name pins functions
96 mpp5 5 gpio, dev(ad12), au(i2sdi), ge0(rxclk), tdm(intn), mss_uart(txd), uart1(rts), pcie1(clkreq),…
103 mpp12 12 gpio, dev(clk_out), nf(rbn1), spi1(csn1), ge0(rxclk)
141 mpp50 50 gpio, ge1(rxclk), mss_i2c(sda), spi1(csn0), uart2(txd), uart0(rxd), xg(mdio), sdio(pwr11)
156 -----
159 Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml.
163 - compatible: "marvell,armada-8k-gpio"
165 - offset: offset address inside the syscon block
169 CP110_LABEL(syscon0): system-controller@440000 {
170 compatible = "syscon", "simple-mfd";
174 compatible = "marvell,cp110-clock";
175 #clock-cells = <2>;
179 compatible = "marvell,armada-8k-cpm-pinctrl";
183 compatible = "marvell,armada-8k-gpio";
186 gpio-controller;
187 #gpio-cells = <2>;
188 gpio-ranges = <&CP110_LABEL(pinctrl) 0 0 32>;
197 --------
203 critical point to any subnode of the thermal-zone node.
209 - compatible: must be one of:
210 * marvell,armada-cp110-thermal
211 - reg: register range associated with the thermal functions.
214 - interrupts-extended: overheat interrupt handle. Should point to
215 a line of the ICU-SEI irqchip (116 is what is usually used by the
216 firmware). The ICU-SEI will redirect towards interrupt line #37 of the
218 See interrupt-controller/interrupts.txt
219 - #thermal-sensor-cells: shall be <1> when thermal-zones subnodes refer
224 CP110_LABEL(syscon1): system-controller@6f8000 {
225 compatible = "syscon", "simple-mfd";
228 CP110_LABEL(thermal): thermal-sensor@70 {
229 compatible = "marvell,armada-cp110-thermal";
231 interrupts-extended = <&CP110_LABEL(icu_sei) 116 IRQ_TYPE_LEVEL_HIGH>;
232 #thermal-sensor-cells = <1>;