Lines Matching +full:in +full:- +full:application

1 .. SPDX-License-Identifier: GPL-2.0
24   4.2 "My application needs exclusive control of hardware channels"
32 bulk memory transfers/transforms with support for inter-transactional
43 xor-parity-calculations of the md-raid5 driver using the offload engines
44 present in the Intel(R) Xscale series of I/O processors.  It also built
45 on the 'dmaengine' layer developed for offloading memory copies in the
52    in software otherwise.
54    operations to be submitted, like xor->copy->xor in the raid5 case.  The
64 -----------------------------
72 ------------------------
83 pq_val    validate that a p and or q buffer are in sync with a given series of
92 -------------------------
94 The return value is non-NULL and points to a 'descriptor' when the operation
97 operations complete.  When an application needs to submit a chain of
100 acknowledged by the application before the offload engine driver is allowed to
110 ------------------------------------
115 manage the channel.  Once a driver-specific threshold is met the driver
116 automatically issues pending operations.  An application can force this
118 channels since the application has no knowledge of channel to operation
122 -------------------------------------
124 There are two methods for an application to learn about the completion
130 2. Specify a completion callback.  The callback routine runs in tasklet
132    called in application context if the operation is carried out
133    synchronously in software.  The callback can be set in the call to
134    async_<operation>, or when the application needs to submit a chain of
139 ---------------
141 1. Calls to async_<operation> are not permitted in IRQ context.  Other
144    results in recursion in the synchronous case and spin_locks being
145    acquired twice in the asynchronous case.
148 -----------
150 Perform a xor->copy->xor operation where each operation depends on the
192 ops_run_* and ops_complete_* routines in drivers/md/raid5.c for more
199 ----------------------
201 There are a few conformance points required in dmaengine drivers to
204 1. Completion callbacks are expected to happen in tasklet context
205 2. dma_async_tx_descriptor fields are never manipulated in IRQ context
206 3. Use async_tx_run_dependencies() in the descriptor clean up path to
209 4.2 "My application needs exclusive control of hardware channels"
210 -----------------------------------------------------------------
213 is being used to support device-to-memory operations.  A channel that is
232 disposition the available channels in the system. The filter_fn routine
233 is called once for each free channel in the system.  Upon seeing a
240 not be used by the general-purpose allocator.  It can be set at
248    considered by the general-purpose allocator even after a call to
255 ---------