Lines Matching refs:instructions
33 mnemonic functions when describing the semantics of instructions.
120 An implementation does not need to support all instructions specified in this
121 document (e.g., deprecated instructions). Instead, a number of conformance
124 conformance group means it MUST support all instructions in that conformance
128 that executes instructions, and tools such as compilers that generate
129 instructions for the runtime. Thus, capability discovery in terms of
133 corresponds to a set of instructions that are mandatory. That is, each
138 * base32: includes all instructions defined in this
140 * base64: includes base32, plus instructions explicitly noted
142 * atomic32: includes 32-bit atomic operation instructions (see `Atomic operations`_).
143 * atomic64: includes atomic32, plus 64-bit atomic operation instructions.
144 * divmul32: includes 32-bit division, multiplication, and modulo instructions.
146 and modulo instructions.
147 * packet: deprecated packet access instructions.
198 (`64-bit immediate instructions`_ reuse this field for other purposes)
202 (future instructions might reuse this field for other purposes)
206 otherwise specified (some arithmetic instructions reuse this field
224 Note that most instructions do not use all of the fields.
230 Some instructions are defined to use the wide instruction encoding,
277 LD 0x0 non-standard load operations `Load and store instructions`_
278 LDX 0x1 load into register operations `Load and store instructions`_
279 ST 0x2 store from immediate operations `Load and store instructions`_
280 STX 0x3 store from register operations `Load and store instructions`_
281 ALU 0x4 32-bit arithmetic operations `Arithmetic and jump instructions`_
282 JMP 0x5 64-bit jump operations `Arithmetic and jump instructions`_
283 JMP32 0x6 32-bit jump operations `Arithmetic and jump instructions`_
284 ALU64 0x7 64-bit arithmetic operations `Arithmetic and jump instructions`_
287 Arithmetic and jump instructions
290 For arithmetic and jump instructions (``ALU``, ``ALU64``, ``JMP`` and
315 Arithmetic instructions
319 otherwise identical operations. ``ALU64`` instructions belong to the
325 .. table:: Arithmetic instructions
346 END 0xd 0 byte swap operations (see `Byte swap instructions`_ below)
382 Note that most arithmetic instructions have 'offset' set to 0. Only three instructions
413 operands into 64-bit operands. Unlike other arithmetic instructions,
435 Byte swap instructions
438 The byte swap instructions use instruction classes of ``ALU`` and ``ALU64``
441 The byte swap instructions operate on the destination register
449 .. table:: Byte swap instructions
484 Jump instructions
493 .. table:: Jump instructions
518 is in units of 64-bit instructions relative to the instruction following
541 Note that there are two flavors of ``JA`` instructions. The
548 All ``CALL`` and ``JA`` instructions belong to the
578 Load and store instructions
581 For load and store instructions (``LD``, ``LDX``, ``ST``, and ``STX``), the
596 IMM 0 64-bit immediate instructions `64-bit immediate instructions`_
597 …BS 1 legacy BPF packet access (absolute) `Legacy BPF Packet access instructions`_
598 …ND 2 legacy BPF packet access (indirect) `Legacy BPF Packet access instructions`_
627 instructions that transfer data between a register and memory.
648 instructions that transfer data between a register and memory.
724 64-bit immediate instructions
731 The following table defines a set of ``{IMM, DW, LD}`` instructions
735 .. table:: 64-bit immediate instructions
755 …ts the address of the instruction at a specified relative offset in number of (64-bit) instructions
781 Legacy BPF Packet access instructions
784 BPF previously introduced special instructions for access to packet data that were
785 carried over from classic BPF. These instructions used an instruction
789 instructions are deprecated and SHOULD no longer be used. All legacy packet
790 access instructions belong to the "packet" conformance group.