Lines Matching +full:reg +full:- +full:space

1 .. SPDX-License-Identifier: GPL-2.0
3 Using FS and GS segments in user space applications
10   Segment-register:Byte-address
12 The segment base address is added to the Byte-address to compute the
14 instances of data with the identical Byte-address, i.e. the same code. The
15 selection of a particular instance is purely based on the base-address in
18 In 32-bit mode the CPU provides 6 segments, which also support segment
19 limits. The limits can be used to enforce address space protections.
21 In 64-bit mode the CS/SS/DS/ES segments are ignored and the base address is
22 always 0 to provide a full 64bit address space. The FS and GS segments are
23 still functional in 64-bit mode.
26 ------------------------------
38 applications. GCC and Clang support GS based addressing via address space
42 ------------------------------------------
46  - the arch_prctl() system call
48  - the FSGSBASE instruction family
51 --------------------------------------
53  The arch_prctl(2) based mechanism is available on all 64-bit CPUs and all
70 ---------------------------------------------------
74  space. These instructions are also supported on AMD Family 17H CPUs. The
78   RDFSBASE %reg   Read the FS base register
79   RDGSBASE %reg   Read the GS base register
80   WRFSBASE %reg   Write the FS base register
81   WRGSBASE %reg   Write the GS base register
85  more flexible usage of the FS/GS addressing modes in user space
99  arch_prctl(). Allowing user space to write arbitrary values to GS base
139 code and the compiler option -mfsgsbase has to be added.
142 -------------------------------------------
145 Named Address Spaces. GCC implements the following address space
180 Clang does not provide the GCC address space identifiers, but it provides
190 -------------------------------------------
195 	mov %fs:offset, %reg
196 	mov %gs:offset, %reg
198 	mov %reg, %fs:offset
199 	mov %reg, %gs:offset