Lines Matching +full:tri +full:- +full:default

1 .. SPDX-License-Identifier: GPL-2.0
4 Vector Extension Support for RISC-V Linux
8 order to support the use of the RISC-V Vector Extension.
11 ---------------------
19 are not portable to non-Linux, nor non-RISC-V environments, so it is discourage
27     argument consists of two 2-bit enablement statuses and a bit for inheritance
30     Enablement status is a tri-state value each occupying 2-bit of space in
33     * :c:macro:`PR_RISCV_V_VSTATE_CTRL_DEFAULT`: Use the system-wide default
34       enablement status on execve(). The system-wide default setting can be
43     arg: The control argument is a 5-bit value consisting of 3 parts, and
64           then the enablement status will be decided by the system-wide
71           This setting persists across changes in the system-wide default value.
92     next execve() call and the inheritance bit are all OR-ed together.
103 -----------------------------------------
107 developers to control the default Vector enablement status for userspace
112     Writing the text representation of 0 or 1 to this file sets the default
116     * 0: Do not allow Vector code to be executed as the default for new processes.
117     * 1: Allow Vector code to be executed as the default for new processes.
119     Reading this file returns the current system default enablement status.
122     the system default, unless:
131     Modifying the system default enablement status does not affect the enablement
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140 1: https://github.com/riscv/riscv-v-spec/blob/master/calling-convention.adoc