Lines Matching refs:supported

28 all online CPUs. The currently supported flags are:
74   * :c:macro:`RISCV_HWPROBE_IMA_FD`: The F and D extensions are supported, as
78   * :c:macro:`RISCV_HWPROBE_IMA_C`: The C extension is supported, as defined
81   * :c:macro:`RISCV_HWPROBE_IMA_V`: The V extension is supported, as defined by
85        supported, as defined in version 1.0 of the Bit-Manipulation ISA
88   * :c:macro:`RISCV_HWPROBE_EXT_ZBB`: The Zbb extension is supported, as defined
91   * :c:macro:`RISCV_HWPROBE_EXT_ZBS`: The Zbs extension is supported, as defined
94   * :c:macro:`RISCV_HWPROBE_EXT_ZICBOZ`: The Zicboz extension is supported, as
97   * :c:macro:`RISCV_HWPROBE_EXT_ZBC` The Zbc extension is supported, as defined
100   * :c:macro:`RISCV_HWPROBE_EXT_ZBKB` The Zbkb extension is supported, as
103   * :c:macro:`RISCV_HWPROBE_EXT_ZBKC` The Zbkc extension is supported, as
106   * :c:macro:`RISCV_HWPROBE_EXT_ZBKX` The Zbkx extension is supported, as
109   * :c:macro:`RISCV_HWPROBE_EXT_ZKND` The Zknd extension is supported, as
112   * :c:macro:`RISCV_HWPROBE_EXT_ZKNE` The Zkne extension is supported, as
115   * :c:macro:`RISCV_HWPROBE_EXT_ZKNH` The Zknh extension is supported, as
118   * :c:macro:`RISCV_HWPROBE_EXT_ZKSED` The Zksed extension is supported, as
121   * :c:macro:`RISCV_HWPROBE_EXT_ZKSH` The Zksh extension is supported, as
124   * :c:macro:`RISCV_HWPROBE_EXT_ZKT` The Zkt extension is supported, as defined
127   * :c:macro:`RISCV_HWPROBE_EXT_ZVBB`: The Zvbb extension is supported as
130   * :c:macro:`RISCV_HWPROBE_EXT_ZVBC`: The Zvbc extension is supported as
133   * :c:macro:`RISCV_HWPROBE_EXT_ZVKB`: The Zvkb extension is supported as
136   * :c:macro:`RISCV_HWPROBE_EXT_ZVKG`: The Zvkg extension is supported as
139   * :c:macro:`RISCV_HWPROBE_EXT_ZVKNED`: The Zvkned extension is supported as
142   * :c:macro:`RISCV_HWPROBE_EXT_ZVKNHA`: The Zvknha extension is supported as
145   * :c:macro:`RISCV_HWPROBE_EXT_ZVKNHB`: The Zvknhb extension is supported as
148   * :c:macro:`RISCV_HWPROBE_EXT_ZVKSED`: The Zvksed extension is supported as
151   * :c:macro:`RISCV_HWPROBE_EXT_ZVKSH`: The Zvksh extension is supported as
154   * :c:macro:`RISCV_HWPROBE_EXT_ZVKT`: The Zvkt extension is supported as
157   * :c:macro:`RISCV_HWPROBE_EXT_ZFH`: The Zfh extension version 1.0 is supported
161        supported as defined in the RISC-V ISA manual.
164        is supported as defined in the RISC-V ISA manual.
166   * :c:macro:`RISCV_HWPROBE_EXT_ZVFH`: The Zvfh extension is supported as
170   * :c:macro:`RISCV_HWPROBE_EXT_ZVFHMIN`: The Zvfhmin extension is supported as
174   * :c:macro:`RISCV_HWPROBE_EXT_ZFA`: The Zfa extension is supported as
178   * :c:macro:`RISCV_HWPROBE_EXT_ZTSO`: The Ztso extension is supported as
182   * :c:macro:`RISCV_HWPROBE_EXT_ZACAS`: The Zacas extension is supported as
186   * :c:macro:`RISCV_HWPROBE_EXT_ZICOND`: The Zicond extension is supported as
192        supported as defined in the RISC-V ISA manual starting from commit
196     supported, as defined by version 1.0 of the RISC-V Vector extension manual.
199     supported, as defined by version 1.0 of the RISC-V Vector extension manual.
202     supported, as defined by version 1.0 of the RISC-V Vector extension manual.
205     supported, as defined by version 1.0 of the RISC-V Vector extension manual.
208     supported, as defined by version 1.0 of the RISC-V Vector extension manual.
211        supported as defined in the RISC-V ISA manual starting from commit
235        supported as defined in the RISC-V ISA manual starting from commit
238   * :c:macro:`RISCV_HWPROBE_EXT_ZAWRS`: The Zawrs extension is supported as
242   * :c:macro:`RISCV_HWPROBE_EXT_SUPM`: The Supm extension is supported as
262     accesses. Misaligned accesses may be supported directly in hardware, or
270     accesses are not supported at all and will generate a misaligned address
289     Misaligned accesses may be supported directly in hardware, or trapped and emulated by software.
295     not supported at all and will generate a misaligned address fault.