Lines Matching refs:extensions
70 * :c:macro:`RISCV_HWPROBE_KEY_IMA_EXT_0`: A bitmask containing the extensions
74 * :c:macro:`RISCV_HWPROBE_IMA_FD`: The F and D extensions are supported, as
86 extensions.
89 in version 1.0 of the Bit-Manipulation ISA extensions.
92 in version 1.0 of the Bit-Manipulation ISA extensions.
98 in version 1.0 of the Bit-Manipulation ISA extensions.
101 defined in version 1.0 of the Scalar Crypto ISA extensions.
104 defined in version 1.0 of the Scalar Crypto ISA extensions.
107 defined in version 1.0 of the Scalar Crypto ISA extensions.
110 defined in version 1.0 of the Scalar Crypto ISA extensions.
113 defined in version 1.0 of the Scalar Crypto ISA extensions.
116 defined in version 1.0 of the Scalar Crypto ISA extensions.
119 defined in version 1.0 of the Scalar Crypto ISA extensions.
122 defined in version 1.0 of the Scalar Crypto ISA extensions.
125 in version 1.0 of the Scalar Crypto ISA extensions.
221 extensions for code size reduction, as ratified in commit 8be3419c1c0
226 extensions for code size reduction, as ratified in commit 8be3419c1c0
231 extensions for code size reduction, as ratified in commit 8be3419c1c0
236 extensions for code size reduction, as ratified in commit 8be3419c1c0
257 defined in version 1.0 of the RISC-V Pointer Masking extensions.
331 thead vendor extensions that are compatible with the
337 extension is supported in the T-Head ISA extensions spec starting from
344 sifive vendor extensions that are compatible with the