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10 I - Software License for Firmware
12 II - Microcode Availability
14 III - Description and Terminology
16 IV - Microcode Programming Details
18 V - Firmware Structure Layout
20 VI - Sample Code for Creating Firmware Files
25 November 30, 2007: Rev 1.0 - Initial version
27 I - Software License for Firmware
34 II - Microcode Availability
41 III - Description and Terminology
44 In this document, the term 'microcode' refers to the sequence of 32-bit
57 IV - Microcode Programming Details
60 The QE architecture allows for only one microcode present in I-RAM for each
61 RISC processor. To replace any current microcode, a full QE reset (which
66 1) The microcode is placed into I-RAM at a specific location, using the
70 needs split I-RAM. Split I-RAM is only meaningful for SOCs that have
71 QEs with multiple RISC processors, such as the 8360. Splitting the I-RAM
94 ---------------------------------------------------------------
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112 ---------------------------------------------------------------
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119 This is a double word bit array (64 bits) that defines special functionality
124 -----------------------------------------------------------------------
126 -----------------------------------------------------------------------
132 -----------------------------------------------------------------------
136 | | | following that re-issue the ATM RX INIT |
142 -----------------------------------------------------------------------
149 -----------------------------------------------------------------------
155 -----------------------------------------------------------------------
162 -----------------------------------------------------------------------
163 | 5 - 31 | N/A | Reserved, set to zero. |
164 -----------------------------------------------------------------------
166 V - Firmware Structure Layout
180 All integers are big-endian. See the comments for function
181 qe_upload_firmware() for up-to-date implementation information.
202 The 'id' field is a null-terminated string(suitable for printing) that
219 The 'model' field is a 16-bit number that matches the actual SOC. The
230 'extended_modes' field is aligned on a 64-bit boundary.
245 The 'id' field is a null-terminated string suitable for printing that
251 is written as-is to the TIBCR[i] register, so be sure to set the EN
259 'count' is the number of 32-bit words in the microcode.
271 is an array, the 64-bit 'extended_modes' field needs to be aligned
272 on a 64-bit boundary, and this can only happen if the size of
276 After the last microcode is a 32-bit CRC. It can be calculated using
284 while (len--) {
292 VI - Sample Code for Creating Firmware Files