Lines Matching +full:0 +full:x392
101 0x0 Current Mode Information CRMD
102 0x1 Pre-exception Mode Information PRMD
103 0x2 Extension Unit Enable EUEN
104 0x3 Miscellaneous Control MISC
105 0x4 Exception Configuration ECFG
106 0x5 Exception Status ESTAT
107 0x6 Exception Return Address ERA
108 0x7 Bad (Faulting) Virtual Address BADV
109 0x8 Bad (Faulting) Instruction Word BADI
110 0xC Exception Entrypoint Address EENTRY
111 0x10 TLB Index TLBIDX
112 0x11 TLB Entry High-order Bits TLBEHI
113 0x12 TLB Entry Low-order Bits 0 TLBELO0
114 0x13 TLB Entry Low-order Bits 1 TLBELO1
115 0x18 Address Space Identifier ASID
116 0x19 Page Global Directory Address for PGDL
118 0x1A Page Global Directory Address for PGDH
120 0x1B Page Global Directory Address PGD
121 0x1C Page Walk Control for Lower- PWCL
123 0x1D Page Walk Control for Higher- PWCH
125 0x1E STLB Page Size STLBPS
126 0x1F Reduced Virtual Address Configuration RVACFG
127 0x20 CPU Identifier CPUID
128 0x21 Privileged Resource Configuration 1 PRCFG1
129 0x22 Privileged Resource Configuration 2 PRCFG2
130 0x23 Privileged Resource Configuration 3 PRCFG3
131 0x30+n (0≤n≤15) Saved Data register SAVEn
132 0x40 Timer Identifier TID
133 0x41 Timer Configuration TCFG
134 0x42 Timer Value TVAL
135 0x43 Compensation of Timer Count CNTC
136 0x44 Timer Interrupt Clearing TICLR
137 0x60 LLBit Control LLBCTL
138 0x80 Implementation-specific Control 1 IMPCTL1
139 0x81 Implementation-specific Control 2 IMPCTL2
140 0x88 TLB Refill Exception Entrypoint TLBRENTRY
142 0x89 TLB Refill Exception BAD (Faulting) TLBRBADV
144 0x8A TLB Refill Exception Return Address TLBRERA
145 0x8B TLB Refill Exception Saved Data TLBRSAVE
147 0x8C TLB Refill Exception Entry Low-order TLBRELO0
148 Bits 0
149 0x8D TLB Refill Exception Entry Low-order TLBRELO1
151 0x8E TLB Refill Exception Entry High-order TLBEHI
153 0x8F TLB Refill Exception Pre-exception TLBRPRMD
155 0x90 Machine Error Control MERRCTL
156 0x91 Machine Error Information 1 MERRINFO1
157 0x92 Machine Error Information 2 MERRINFO2
158 0x93 Machine Error Exception Entrypoint MERRENTRY
160 0x94 Machine Error Exception Return MERRERA
162 0x95 Machine Error Exception Saved Data MERRSAVE
164 0x98 Cache TAGs CTAG
165 0x180+n (0≤n≤3) Direct Mapping Configuration Window n DMWn
166 0x200+2n (0≤n≤31) Performance Monitor Configuration n PMCFGn
167 0x201+2n (0≤n≤31) Performance Monitor Overall Counter n PMCNTn
168 0x300 Memory Load/Store WatchPoint MWPC
170 0x301 Memory Load/Store WatchPoint MWPS
172 0x310+8n (0≤n≤7) Memory Load/Store WatchPoint n MWPnCFG1
174 0x311+8n (0≤n≤7) Memory Load/Store WatchPoint n MWPnCFG2
176 0x312+8n (0≤n≤7) Memory Load/Store WatchPoint n MWPnCFG3
178 0x313+8n (0≤n≤7) Memory Load/Store WatchPoint n MWPnCFG4
180 0x380 Instruction Fetch WatchPoint FWPC
182 0x381 Instruction Fetch WatchPoint FWPS
184 0x390+8n (0≤n≤7) Instruction Fetch WatchPoint n FWPnCFG1
186 0x391+8n (0≤n≤7) Instruction Fetch WatchPoint n FWPnCFG2
188 0x392+8n (0≤n≤7) Instruction Fetch WatchPoint n FWPnCFG3
190 0x393+8n (0≤n≤7) Instruction Fetch WatchPoint n FWPnCFG4
192 0x500 Debug Register DBG
193 0x501 Debug Exception Return Address DERA
194 0x502 Debug Exception Saved Data Register DSAVE
295 Direct-mapped virtual memory is configured by CSR.DMWn (n=0~3), it has a simple
309 ``UVRANGE`` ``0x00000000 - 0x7FFFFFFF`` Page-mapped, Cached, PLV0~3
310 ``KPRANGE0`` ``0x80000000 - 0x9FFFFFFF`` Direct-mapped, Uncached, PLV0
311 ``KPRANGE1`` ``0xA0000000 - 0xBFFFFFFF`` Direct-mapped, Cached, PLV0
312 ``KVRANGE`` ``0xC0000000 - 0xFFFFFFFF`` Page-mapped, Cached, PLV0
317 direct-mapped VA of 0x00001000 is 0x80001000, and the cached direct-mapped
318 VA of 0x00001000 is 0xA0001000.
325 ``XUVRANGE`` ``0x0000000000000000 - Page-mapped, Cached, PLV0~3
326 0x3FFFFFFFFFFFFFFF``
327 ``XSPRANGE`` ``0x4000000000000000 - Direct-mapped, Cached / Uncached, PLV0
328 0x7FFFFFFFFFFFFFFF``
329 ``XKPRANGE`` ``0x8000000000000000 - Direct-mapped, Cached / Uncached, PLV0
330 0xBFFFFFFFFFFFFFFF``
331 ``XKVRANGE`` ``0xC000000000000000 - Page-mapped, Cached, PLV0
332 0xFFFFFFFFFFFFFFFF``
337 is configured by bits 60~61 in VA: 0 is for strongly-ordered uncached, 1 is
343 XKPRANGE) of 0x00000000_00001000 is 0x80000000_00001000, the coherent cached
344 direct-mapped VA (in XKPRANGE) of 0x00000000_00001000 is 0x90000000_00001000,
345 and the weakly-ordered uncached direct-mapped VA (in XKPRANGE) of 0x00000000
346 _00001000 is 0xA0000000_00001000.