Lines Matching +full:attribute +full:- +full:set
1 .. SPDX-License-Identifier: GPL-2.0
13 :Date: 2019-03-06
16 ------------
18 This attribute excludes userspace.
20 Userspace always runs at EL0 and thus this attribute will exclude EL0.
24 --------------
26 This attribute excludes the kernel.
31 For the host this attribute will exclude EL1 and additionally EL2 on a VHE
34 For the guest this attribute will exclude EL1. Please note that EL2 is
39 ----------
41 This attribute excludes the hypervisor.
43 For a VHE host this attribute is ignored as we consider the host kernel to
46 For a non-VHE host this attribute will exclude EL2 as we consider the
50 For the guest this attribute has no effect. Please note that EL2 is
55 ----------------------------
59 The KVM host may run at EL0 (userspace), EL1 (non-VHE kernel) and EL2 (VHE
60 kernel or non-VHE hypervisor).
65 exclusively rely on the PMU's hardware exception filtering - therefore we
67 performed differently on VHE and non-VHE systems.
69 For non-VHE systems we exclude EL2 for exclude_host - upon entering and
79 non-VHE guest however please note that EL2 is never counted within a guest.
83 --------
85 On non-VHE hosts we enable/disable counters on the entry/exit of host/guest
86 transition at EL2 - however there is a period of time between
99 --------
102 implementation is cpu-dependent.
106 This targets specifically self-monitoring tasks in order to reduce the overhead
109 How-to
110 ------
111 The focus is set on the armv8 PMUv3 which makes sure that the access to the pmu
118 .. code-block:: sh
123 attr bit set: the sys_perf_event_open syscall returns a fd which can
133 and perf_evsel__read() functions. See `tools/lib/perf/tests/test-evsel.c`_ for
137 ---------------------------
140 the corresponding PMU instance is opened by specifying the 'type' attribute.
143 Have a look at `tools/perf/arch/arm64/tests/user-events.c`_ for an example. It
147 .. code-block:: sh
149 perf test -v user
152 --------------------------------------
153 The user can request either a 32-bit (config1:0 == 0) or 64-bit (config1:0 == 1)
155 if a 64-bit counter is requested and the hardware doesn't support 64-bit
157 access. If a 32-bit counter is requested on hardware with 64-bit counters, then
158 userspace must treat the upper 32-bits read from the counter as UNKNOWN. The
163 .. _tools/perf/arch/arm64/tests/user-events.c:
164 …rnel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/tools/perf/arch/arm64/tests/user-events.c
165 .. _tools/lib/perf/tests/test-evsel.c:
166 …//git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/tools/lib/perf/tests/test-evsel.c
172 --------
176 threshold_compare is set to 2 ('Greater than or equal'), and the
177 threshold is set to 2, then the PMU counter will now only increment by
185 How-to
186 ------
190 .. list-table::
191 :header-rows: 1
193 * - Parameter
194 - Description
195 * - threshold
196 - Value to threshold the event by. A value of 0 means that
198 * - threshold_compare
199 - | Comparison function to use, with the following values supported:
201 | 0: Not-equal
203 | 2: Greater-than-or-equal
204 | 3: Less-than
205 * - threshold_count
206 - If this is set, count by 1 after passing the threshold condition
212 .. code-block:: sh
214 perf stat -e stall_slot/threshold=2,threshold_compare=2/ \
215 -e dtlb_walk/threshold=10,threshold_compare=3,threshold_count/
224 .. code-block:: sh
236 0, and attempting to set a threshold value will also result in an error.