Lines Matching +full:last +full:- +full:interrupt +full:- +full:source
8 the local time zone or daylight savings time -- unless they dual boot
9 with MS-Windows -- but will instead be set to Coordinated Universal Time
12 The newest non-PC hardware tends to just count seconds, like the time(2)
16 Linux has two largely-compatible userspace RTC API families you may
20 so it's not very portable to non-x86 systems.
35 Old PC/AT-Compatible driver: /dev/rtc
36 --------------------------------------
44 a few ways (enabling longer alarm periods, and wake-from-hibernate).
49 are reported by interrupt number 8. (Oh! So *that* is what IRQ 8 is
54 The clock can also be set to generate an interrupt upon every clock
59 the type of interrupt (update-done, alarm-rang, or periodic) that was
61 the last read. Status information is reported through the pseudo-file
67 select(2) on /dev/rtc -- either will block/stop the user process until
68 the next interrupt is received. This is useful for things like
73 the number of interrupts received since the last read to determine if
74 there has been any interrupt "pileup" so to speak. Just for reference, a
75 typical 486-33 running a tight read loop on /dev/rtc will start to suffer
76 occasional interrupt pileup (i.e. > 1 IRQ event since last read) for
79 normal timer interrupt, which is 100Hz.
81 Programming and/or enabling interrupt frequencies greater than 64Hz is
83 an evil user generating lots of IRQs on a slow 386sx-16, where it might have
85 a different value to /proc/sys/dev/rtc/max-user-freq. Note that the
86 interrupt handler is only a few lines of code to minimize any possibility
89 Also, if the kernel time is synchronized with an external source, the
93 don't synchronize the kernel time with an external source (via ntp or
97 The alarm and/or interrupt frequency are programmed into the RTC via
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111 Because Linux supports many non-ACPI and non-PC platforms, some of which
113 than expecting a single battery-backed MC146818 clone on every system.
128 integrated into embeddable system-on-chip (SOC) processors to discrete chips
130 even support for PC-style RTCs ... including the features exposed on newer PCs
134 example, maybe the low-power battery-backed RTC is a discrete I2C chip, but