Lines Matching refs:processor

64 the processor.
93 enabled in the processor and possibly on the processor model.
105 If the processor supports the HWP feature, it will be enabled during the
106 processor initialization and cannot be disabled after that.  It is possible
110 If the HWP feature has been enabled, ``intel_pstate`` relies on the processor to
111 select P-states by itself, but still it can give hints to the processor's
116 Even though the P-state selection is carried out by the processor automatically,
125 In this configuration ``intel_pstate`` will write 0 to the processor's
127 Energy-Performance Bias (EPB) knob (otherwise), which means that the processor's
135 Also, in this configuration the range of P-states available to the processor's
142 In this configuration ``intel_pstate`` will set the processor's
146 set to by the platform firmware).  This usually causes the processor's
158 any processor with the HWP feature enabled.]
171 the processor model and platform configuration.
208 regardless of whether or not the given processor supports HWP.  [Note that the
244 different types of processor behavior, above and below a boundary that
250 multicore processor to opportunistically increase the P-state of one or more
252 thermal envelope of the processor package to be exceeded.
255 (that is, above the turbo threshold), the processor is permitted to take over
258 different processor generations.  Namely, the Sandy Bridge generation of
261 processor generations will take it as a license to use any P-states from the
263 processors setting any P-state from the turbo range will enable the processor
269 those states indefinitely, because the power distribution within the processor
274 fact, if one of them is set by software, the processor is not expected to change
289 processor model and can be determined by reading the processor's model-specific
303 (even if the Configurable TDP feature is enabled in the processor), its
312 To handle a given processor ``intel_pstate`` requires a number of different
327 Generally, ways to obtain that information are specific to the processor model
328 or family.  Although it often is possible to obtain all of it from the processor
333 the driver initialization will fail if the detected processor is not in that
404 running on a hybrid processor without SMT.
410 ``intel_pstate`` runs on a hybrid processor without SMT, in addition to enabling
411 :ref:`CAS` it registers an Energy Model for the processor.  This allows the
474 	Number of P-states supported by the processor (between 0 and 255
513 	the processor.  If set (equal to 1), it causes the minimum P-state limit
571 ``scaling_cur_freq`` attributes are produced by applying a processor-specific
607 processor:
666 If the hardware-managed P-states (HWP) is enabled in the processor, additional
668 processor's internal P-state selection logic by focusing it on performance or on
687 internally translated to integer values written to the processor's
772 	processor is supported by it.
797 	supported by the processor.
801 	hardware-managed P-states (HWP) feature is supported by the processor.