Lines Matching refs:P
24 For the processors supported by ``intel_pstate``, the P-state concept is broader
27 information about that). For this reason, the representation of P-states used
32 ``intel_pstate`` maps its internal representation of P-states to frequencies too
38 Since the hardware P-state selection interface used by ``intel_pstate`` is
72 hardware-managed P-states (HWP) support. If it works in this mode, the
77 provides its own scaling algorithms for P-state selection. Those algorithms
80 ``sysfs``). [Note that different P-state selection algorithms may be chosen for
86 For example, the ``powersave`` P-state selection algorithm provided by
90 There are two P-state selection algorithms provided by ``intel_pstate`` in the
92 depends on whether or not the hardware-managed P-states (HWP) feature has been
95 Which of the P-state selection algorithms is used by default depends on the
111 select P-states by itself, but still it can give hints to the processor's
112 internal P-state selection logic. What those hints are depends on which P-state
116 Even though the P-state selection is carried out by the processor automatically,
118 in this mode. However, they are not used for running a P-state selection
128 internal P-state selection logic is expected to focus entirely on performance.
135 Also, in this configuration the range of P-states available to the processor's
136 internal P-state selection logic is always restricted to the upper boundary
137 (that is, the maximum P-state that the driver is allowed to use).
147 internal P-state selection logic to be less performance-focused.
161 CPU scheduler in order to run a P-state selection algorithm, either
170 Without HWP, this P-state selection algorithm is always the same regardless of
173 It selects the maximum P-state it is allowed to use, subject to limits set via
177 This is the default P-state selection algorithm if the
184 Without HWP, this P-state selection algorithm is similar to the algorithm
187 registers of the CPU. It generally selects P-states proportional to the
193 is not touched if the new P-state turns out to be the same as the current
196 This is the default P-state selection algorithm if the
206 hardware-managed P-states (HWP) support. It is always used if the
219 hardware in order to change the P-state of a CPU (in particular, the
224 in ``sysfs`` (and the P-state selection algorithms described above are not
230 the entire range of available P-states is exposed by ``intel_pstate`` to the
239 Turbo P-states Support
242 In the majority of cases, the entire range of P-states available to
247 The P-states above the turbo threshold are referred to as "turbo P-states" and
248 the whole sub-range of P-states they belong to is referred to as the "turbo
250 multicore processor to opportunistically increase the P-state of one or more
254 Specifically, if software sets the P-state of a CPU core within the turbo range
256 performance scaling control for that core and put it into turbo P-states of its
259 processors will never use any P-states above the last one set by software for
261 processor generations will take it as a license to use any P-states from the
263 processors setting any P-state from the turbo range will enable the processor
264 to put the given core into all turbo P-states up to and including the maximum
267 One important property of turbo P-states is that they are not sustainable. More
271 be exceeded if a turbo P-state was used for too long.
273 In turn, the P-states below the turbo threshold generally are sustainable. In
276 situation (a higher P-state may still be used if it is set for another CPU in
279 Some processors allow multiple cores to be in turbo P-states at the same time,
280 but the maximum P-state that can be set for them generally depends on the number
281 of cores running concurrently. The maximum turbo P-state that can be set for 3
282 cores at the same time usually is lower than the analogous maximum P-state for
283 2 cores, which in turn usually is lower than the maximum turbo P-state that can
284 be set for 1 core. The one-core maximum turbo P-state is thus the maximum
287 The maximum supported turbo P-state, the turbo threshold (the maximum supported
288 non-turbo P-state) and the minimum supported P-state are specific to the
296 the entire range of available P-states, including the whole turbo range, to the
298 generally causes turbo P-states to be set more often when ``intel_pstate`` is
305 work as expected in all cases (that is, if set to disable turbo P-states, it
315 * The minimum supported P-state.
317 * The maximum supported :ref:`non-turbo P-state <turbo>`.
319 * Whether or not turbo P-states are supported at all.
321 * The maximum supported :ref:`one-core turbo P-state <turbo>` (if turbo
322 P-states are supported).
325 of P-states into frequencies and the other way around.
343 cores differing by the maximum turbo P-state, performance vs power characteristics,
456 Maximum P-state the driver is allowed to set in percent of the
458 P-state <turbo>`).
465 Minimum P-state the driver is allowed to set in percent of the
467 P-state <turbo>`).
474 Number of P-states supported by the processor (between 0 and 255
475 inclusive) including both turbo and non-turbo P-states (see
488 range of supported P-states, in percent.
498 If set (equal to 1), the driver is not allowed to set any turbo P-states
500 default), turbo P-states can be set by the driver.
507 but it affects the maximum possible value of per-policy P-state limits
513 the processor. If set (equal to 1), it causes the minimum P-state limit
518 This setting has no effect on logical CPUs whose minimum P-state limit
519 is directly set to the highest non-turbo P-state or above it.
572 multiplier to the internal P-state representation used by ``intel_pstate``.
574 attributes are capped by the frequency corresponding to the maximum P-state that
578 is not allowed to use turbo P-states, so the maximum value of
580 non-turbo P-state frequency.
588 and ``scaling_min_freq`` corresponds to the maximum supported turbo P-state,
595 List of P-state selection algorithms provided by ``intel_pstate``.
598 P-state selection algorithm provided by ``intel_pstate`` currently in
602 Frequency of the average P-state of the CPU represented by the given
623 Coordination of P-State Limits
626 ``intel_pstate`` allows P-state limits to be set in two ways: with the help of
640 P-states, hyper-threading is enabled and on current performance requests
641 from other CPUs. When platform doesn't support per core P-states, the
644 core P-states support, when hyper-threading is enabled, if the sibling CPU
652 limits change in order to request its internal P-state selection logic to always
653 set P-states within these limits. Otherwise, the limits are taken into account
655 driver every time before setting a new P-state for a CPU.
666 If the hardware-managed P-states (HWP) is enabled in the processor, additional
668 processor's internal P-state selection logic by focusing it on performance or on
715 interface, but the set of P-states it can use is limited by the ``_PSS``
718 On those systems each ``_PSS`` object returns a list of P-states supported by
719 the corresponding CPU which basically is a subset of the P-states range that can
723 1 MHz than the frequency of the highest non-turbo P-state listed by it, but the
724 corresponding P-state representation (following the hardware specification)
725 returned for it matches the maximum supported turbo P-state (or is the
728 The list of P-states returned by ``_PSS`` is reflected by the table of
734 of the highest supported non-turbo P-state listed by ``_PSS`` which, of course,
740 (possibly multiplied by a constant), then it will tend to choose P-states below
745 benefit from running at turbo frequencies will be given non-turbo P-states
751 P-states returned by ``_PSS`` properly, there may be more than one item
752 corresponding to a turbo P-state in those lists and there may be a problem with
754 turbo P-states overall, ``acpi-cpufreq`` simply avoids using the topmost state
756 P-states in the list returned by it.
759 :ref:`passive mode <passive_mode>`, except that the number of P-states it can
787 power capping) that rely on the availability of ACPI P-states
796 Do not enable the hardware-managed P-states (HWP) feature even if it is
801 hardware-managed P-states (HWP) feature is supported by the processor.
812 Use per-logical-CPU P-State limits (see
851 P-state is called, the ``ftrace`` filter can be set to
864 # entries-in-buffer/entries-written: 80/80 #P:4