Lines Matching +full:processor +full:- +full:specific
1 .. SPDX-License-Identifier: GPL-2.0
22 Documentation/admin-guide/pm/cpufreq.rst if you have not done that yet.]
24 For the processors supported by ``intel_pstate``, the P-state concept is broader
27 information about that). For this reason, the representation of P-states used
32 ``intel_pstate`` maps its internal representation of P-states to frequencies too
38 Since the hardware P-state selection interface used by ``intel_pstate`` is
43 time the corresponding CPU is taken offline and need to be re-initialized when
47 only way to pass early-configuration-time parameters to it is via the kernel
64 the processor.
69 -----------
72 hardware-managed P-states (HWP) support. If it works in this mode, the
77 provides its own scaling algorithms for P-state selection. Those algorithms
80 ``sysfs``). [Note that different P-state selection algorithms may be chosen for
86 For example, the ``powersave`` P-state selection algorithm provided by
90 There are two P-state selection algorithms provided by ``intel_pstate`` in the
92 depends on whether or not the hardware-managed P-states (HWP) feature has been
93 enabled in the processor and possibly on the processor model.
95 Which of the P-state selection algorithms is used by default depends on the
105 If the processor supports the HWP feature, it will be enabled during the
106 processor initialization and cannot be disabled after that. It is possible
110 If the HWP feature has been enabled, ``intel_pstate`` relies on the processor to
111 select P-states by itself, but still it can give hints to the processor's
112 internal P-state selection logic. What those hints are depends on which P-state
116 Even though the P-state selection is carried out by the processor automatically,
118 in this mode. However, they are not used for running a P-state selection
125 In this configuration ``intel_pstate`` will write 0 to the processor's
126 Energy-Performance Preference (EPP) knob (if supported) or its
127 Energy-Performance Bias (EPB) knob (otherwise), which means that the processor's
128 internal P-state selection logic is expected to focus entirely on performance.
135 Also, in this configuration the range of P-states available to the processor's
136 internal P-state selection logic is always restricted to the upper boundary
137 (that is, the maximum P-state that the driver is allowed to use).
142 In this configuration ``intel_pstate`` will set the processor's
143 Energy-Performance Preference (EPP) knob (if supported) or its
144 Energy-Performance Bias (EPB) knob (otherwise) to whatever value it was
146 set to by the platform firmware). This usually causes the processor's
147 internal P-state selection logic to be less performance-focused.
158 any processor with the HWP feature enabled.]
161 CPU scheduler in order to run a P-state selection algorithm, either
170 Without HWP, this P-state selection algorithm is always the same regardless of
171 the processor model and platform configuration.
173 It selects the maximum P-state it is allowed to use, subject to limits set via
177 This is the default P-state selection algorithm if the
184 Without HWP, this P-state selection algorithm is similar to the algorithm
187 registers of the CPU. It generally selects P-states proportional to the
193 is not touched if the new P-state turns out to be the same as the current
196 This is the default P-state selection algorithm if the
203 ------------
206 hardware-managed P-states (HWP) support. It is always used if the
208 regardless of whether or not the given processor supports HWP. [Note that the
219 hardware in order to change the P-state of a CPU (in particular, the
224 in ``sysfs`` (and the P-state selection algorithms described above are not
229 the so-called "turbo" frequency ranges). In other words, in the passive mode
230 the entire range of available P-states is exposed by ``intel_pstate`` to the
239 Turbo P-states Support
242 In the majority of cases, the entire range of P-states available to
243 ``intel_pstate`` can be divided into two sub-ranges that correspond to
244 different types of processor behavior, above and below a boundary that
247 The P-states above the turbo threshold are referred to as "turbo P-states" and
248 the whole sub-range of P-states they belong to is referred to as the "turbo
250 multicore processor to opportunistically increase the P-state of one or more
252 thermal envelope of the processor package to be exceeded.
254 Specifically, if software sets the P-state of a CPU core within the turbo range
255 (that is, above the turbo threshold), the processor is permitted to take over
256 performance scaling control for that core and put it into turbo P-states of its
258 different processor generations. Namely, the Sandy Bridge generation of
259 processors will never use any P-states above the last one set by software for
261 processor generations will take it as a license to use any P-states from the
263 processors setting any P-state from the turbo range will enable the processor
264 to put the given core into all turbo P-states up to and including the maximum
267 One important property of turbo P-states is that they are not sustainable. More
269 those states indefinitely, because the power distribution within the processor
271 be exceeded if a turbo P-state was used for too long.
273 In turn, the P-states below the turbo threshold generally are sustainable. In
274 fact, if one of them is set by software, the processor is not expected to change
276 situation (a higher P-state may still be used if it is set for another CPU in
279 Some processors allow multiple cores to be in turbo P-states at the same time,
280 but the maximum P-state that can be set for them generally depends on the number
281 of cores running concurrently. The maximum turbo P-state that can be set for 3
282 cores at the same time usually is lower than the analogous maximum P-state for
283 2 cores, which in turn usually is lower than the maximum turbo P-state that can
284 be set for 1 core. The one-core maximum turbo P-state is thus the maximum
287 The maximum supported turbo P-state, the turbo threshold (the maximum supported
288 non-turbo P-state) and the minimum supported P-state are specific to the
289 processor model and can be determined by reading the processor's model-specific
296 the entire range of available P-states, including the whole turbo range, to the
298 generally causes turbo P-states to be set more often when ``intel_pstate`` is
299 used relative to ACPI-based CPU performance scaling (see
300 :ref:`below <acpi-cpufreq>` for more information).
303 (even if the Configurable TDP feature is enabled in the processor), its
305 work as expected in all cases (that is, if set to disable turbo P-states, it
309 Processor Support
312 To handle a given processor ``intel_pstate`` requires a number of different
315 * The minimum supported P-state.
317 * The maximum supported :ref:`non-turbo P-state <turbo>`.
319 * Whether or not turbo P-states are supported at all.
321 * The maximum supported :ref:`one-core turbo P-state <turbo>` (if turbo
322 P-states are supported).
325 of P-states into frequencies and the other way around.
327 Generally, ways to obtain that information are specific to the processor model
328 or family. Although it often is possible to obtain all of it from the processor
329 itself (using model-specific registers), there are cases in which hardware
333 the driver initialization will fail if the detected processor is not in that
343 cores differing by the maximum turbo P-state, performance vs power characteristics,
351 --------------------------
355 one core, ``intel_pstate`` assigns performance-based priorities to CPUs. Namely,
360 The scheduler can pull tasks from lower-priority cores and place them on any
370 more energy-efficient ways.
374 Capacity-Aware Scheduling Support
375 ---------------------------------
377 The capacity-aware scheduling (CAS) support in the CPU scheduler is enabled by
389 balanced because the more performant CPUs are generally less energy-efficient
393 the system and it needs to be able to compute scale-invariant utilization of
399 units are the same for all CPUs. Second, the frequency-invariance computations,
404 running on a hybrid processor without SMT.
406 Energy-Aware Scheduling Support
407 -------------------------------
410 ``intel_pstate`` runs on a hybrid processor without SMT, in addition to enabling
411 :ref:`CAS` it registers an Energy Model for the processor. This allows the
412 Energy-Aware Scheduling (EAS) support to be enabled in the CPU scheduler if
428 Since EAS works on top of CAS, high-utilization tasks are always migrated to
429 CPUs with enough capacity to accommodate them, but thanks to EAS, low-utilization
446 -----------------
456 Maximum P-state the driver is allowed to set in percent of the
458 P-state <turbo>`).
465 Minimum P-state the driver is allowed to set in percent of the
467 P-state <turbo>`).
474 Number of P-states supported by the processor (between 0 and 255
475 inclusive) including both turbo and non-turbo P-states (see
484 This attribute is read-only.
488 range of supported P-states, in percent.
493 This attribute is read-only.
498 If set (equal to 1), the driver is not allowed to set any turbo P-states
500 default), turbo P-states can be set by the driver.
507 but it affects the maximum possible value of per-policy P-state limits
513 the processor. If set (equal to 1), it causes the minimum P-state limit
518 This setting has no effect on logical CPUs whose minimum P-state limit
519 is directly set to the highest non-turbo P-state or above it.
542 that string - or to be unregistered in the "off" case. [Actually,
546 as well as the per-policy ones) are then reset to their default
551 Lake or Coffee Lake desktop CPU model. By default, energy-efficiency
553 Enabling energy-efficiency optimizations may limit maximum operating
557 attribute to "1" enables the energy-efficiency optimizations and setting
563 -----------------------------------
566 Documentation/admin-guide/pm/cpufreq.rst is special with ``intel_pstate``
571 ``scaling_cur_freq`` attributes are produced by applying a processor-specific
572 multiplier to the internal P-state representation used by ``intel_pstate``.
574 attributes are capped by the frequency corresponding to the maximum P-state that
578 is not allowed to use turbo P-states, so the maximum value of
580 non-turbo P-state frequency.
588 and ``scaling_min_freq`` corresponds to the maximum supported turbo P-state,
595 List of P-state selection algorithms provided by ``intel_pstate``.
598 P-state selection algorithm provided by ``intel_pstate`` currently in
602 Frequency of the average P-state of the CPU represented by the given
607 processor:
623 Coordination of P-State Limits
624 ------------------------------
626 ``intel_pstate`` allows P-state limits to be set in two ways: with the help of
636 2. Each individual CPU is affected by its own per-policy limits (that is, it
637 cannot be requested to run faster than its own per-policy maximum and it
638 cannot be requested to run slower than its own per-policy minimum). The
640 P-states, hyper-threading is enabled and on current performance requests
641 from other CPUs. When platform doesn't support per core P-states, the
644 core P-states support, when hyper-threading is enabled, if the sibling CPU
648 3. The global and per-policy limits can be set independently.
652 limits change in order to request its internal P-state selection logic to always
653 set P-states within these limits. Otherwise, the limits are taken into account
655 driver every time before setting a new P-state for a CPU.
664 ---------------------------
666 If the hardware-managed P-states (HWP) is enabled in the processor, additional
668 processor's internal P-state selection logic by focusing it on performance or on
669 energy-efficiency, or somewhere between the two extremes, are present in every
683 self-explanatory, except that ``default`` represents whatever hint
687 internally translated to integer values written to the processor's
688 Energy-Performance Preference (EPP) knob (if supported) or its
689 Energy-Performance Bias (EPB) knob. It is also possible to write a positive
696 load-balancing algorithm and if different energy vs performance hints are
699 or to pin every task potentially sensitive to them to a specific CPU.]
701 .. _acpi-cpufreq:
703 ``intel_pstate`` vs ``acpi-cpufreq``
713 ``acpi-cpufreq`` scaling driver. On systems supported by ``intel_pstate``
714 the ``acpi-cpufreq`` driver uses the same hardware CPU performance scaling
715 interface, but the set of P-states it can use is limited by the ``_PSS``
718 On those systems each ``_PSS`` object returns a list of P-states supported by
719 the corresponding CPU which basically is a subset of the P-states range that can
723 1 MHz than the frequency of the highest non-turbo P-state listed by it, but the
724 corresponding P-state representation (following the hardware specification)
725 returned for it matches the maximum supported turbo P-state (or is the
728 The list of P-states returned by ``_PSS`` is reflected by the table of
729 available frequencies supplied by ``acpi-cpufreq`` to the ``CPUFreq`` core and
733 frequency reported by ``acpi-cpufreq`` is higher by 1 MHz than the frequency
734 of the highest supported non-turbo P-state listed by ``_PSS`` which, of course,
740 (possibly multiplied by a constant), then it will tend to choose P-states below
741 the turbo threshold if ``acpi-cpufreq`` is used as the scaling driver, because
745 benefit from running at turbo frequencies will be given non-turbo P-states
751 P-states returned by ``_PSS`` properly, there may be more than one item
752 corresponding to a turbo P-state in those lists and there may be a problem with
754 turbo P-states overall, ``acpi-cpufreq`` simply avoids using the topmost state
756 P-states in the list returned by it.
758 Apart from the above, ``acpi-cpufreq`` works like ``intel_pstate`` in the
759 :ref:`passive mode <passive_mode>`, except that the number of P-states it can
766 Several kernel command line options can be used to pass early-configuration-time
767 parameters to ``intel_pstate`` in order to enforce specific behavior of it. All
772 processor is supported by it.
784 ``acpi-cpufreq`` even if the latter is preferred on the given system.
787 power capping) that rely on the availability of ACPI P-states
792 ``intel_pstate`` and on platforms where the ``pcc-cpufreq`` scaling
793 driver is used instead of ``acpi-cpufreq``.
796 Do not enable the hardware-managed P-states (HWP) feature even if it is
797 supported by the processor.
801 hardware-managed P-states (HWP) feature is supported by the processor.
812 Use per-logical-CPU P-State limits (see
816 Do not enable :ref:`capacity-aware scheduling <CAS>` which is enabled
823 ------------
827 by ``CPUFreq``, and the other one is the ``pstate_sample`` trace event specific
838 …gnome-terminal--4510 [001] ..s. 1177.680733: pstate_sample: core_busy=107 scaled=94 from=26 to=2…
839 cat-5235 [002] ..s. 1177.681723: cpu_frequency: state=2900000 cpu_id=2
847 ----------
849 The ``ftrace`` interface can be used for low-level diagnostics of
851 P-state is called, the ``ftrace`` filter can be set to
855 # cat available_filter_functions | grep -i pstate
861 # cat trace | head -15
864 # entries-in-buffer/entries-written: 80/80 #P:4
866 # _-----=> irqs-off
867 # / _----=> need-resched
868 # | / _---=> hardirq/softirq
869 # || / _--=> preempt-depth
871 # TASK-PID CPU# |||| TIMESTAMP FUNCTION
873 Xorg-3129 [000] ..s. 2537.644844: intel_pstate_set_pstate <-intel_pstate_timer_func
874 gnome-terminal--4510 [002] ..s. 2537.649844: intel_pstate_set_pstate <-intel_pstate_timer_func
875 gnome-shell-3409 [001] ..s. 2537.650850: intel_pstate_set_pstate <-intel_pstate_timer_func
876 <idle>-0 [000] ..s. 2537.654843: intel_pstate_set_pstate <-intel_pstate_timer_func
885 .. [2] *Intel® 64 and IA-32 Architectures Software Developer’s Manual Volume 3: System Programming …
886 …com/content/www/us/en/architecture-and-technology/64-ia-32-architectures-software-developer-system…