Lines Matching +full:sub +full:- +full:processor
1 .. SPDX-License-Identifier: GPL-2.0
9 ------------
25 ----------------------------------
30 - 2 / 3 CSIPHY modules. They handle the Physical layer of the CSI2 receivers.
32 - 2 / 4 CSID (CSI Decoder) modules. They handle the Protocol and Application
36 - ISPIF (ISP Interface) module. Handles the routing of the data streams from
38 - 1 / 2 VFE (Video Front End) module(s). Contain a pipeline of image processing
48 -----------------------
52 - Input from camera sensor via CSIPHY;
53 - Generation of test input data by the TG in CSID;
54 - RDI interface of VFE
56 - Raw dump of the input data to memory.
60 - YUYV/UYVY/YVYU/VYUY (packed YUV 4:2:2 - V4L2_PIX_FMT_YUYV /
62 - MIPI RAW8 (8bit Bayer RAW - V4L2_PIX_FMT_SRGGB8 /
64 - MIPI RAW10 (10bit packed Bayer RAW - V4L2_PIX_FMT_SBGGR10P /
67 - MIPI RAW12 (12bit packed Bayer RAW - V4L2_PIX_FMT_SRGGB12P /
69 - (8x96 only) MIPI RAW14 (14bit packed Bayer RAW - V4L2_PIX_FMT_SRGGB14P /
72 - (8x96 only) Format conversion of the input data.
76 - MIPI RAW10 (10bit packed Bayer RAW - V4L2_PIX_FMT_SBGGR10P / V4L2_PIX_FMT_Y10P).
80 - Plain16 RAW10 (10bit unpacked Bayer RAW - V4L2_PIX_FMT_SBGGR10 / V4L2_PIX_FMT_Y10).
82 - PIX interface of VFE
84 - Format conversion of the input data.
88 - YUYV/UYVY/YVYU/VYUY (packed YUV 4:2:2 - V4L2_PIX_FMT_YUYV /
93 - NV12/NV21 (two plane YUV 4:2:0 - V4L2_PIX_FMT_NV12 / V4L2_PIX_FMT_NV21);
94 - NV16/NV61 (two plane YUV 4:2:2 - V4L2_PIX_FMT_NV16 / V4L2_PIX_FMT_NV61).
95 - (8x96 only) YUYV/UYVY/YVYU/VYUY (packed YUV 4:2:2 - V4L2_PIX_FMT_YUYV /
98 - Scaling support. Configuration of the VFE Encoder Scale module
101 - Cropping support. Configuration of the VFE Encoder Crop module.
103 - Concurrent and independent usage of two (8x96: three) data inputs -
108 ------------------------------
112 interface, the driver is split into V4L2 sub-devices as follows (8x16 / 8x96):
114 - 2 / 3 CSIPHY sub-devices - each CSIPHY is represented by a single sub-device;
115 - 2 / 4 CSID sub-devices - each CSID is represented by a single sub-device;
116 - 2 / 4 ISPIF sub-devices - ISPIF is represented by a number of sub-devices
117 equal to the number of CSID sub-devices;
118 - 4 / 8 VFE sub-devices - VFE is represented by a number of sub-devices equal to
123 - representing CSIPHY and CSID modules by a separate sub-device for each module
125 - representing VFE by a separate sub-devices for each input interface allows
128 - representing ISPIF by a number of sub-devices equal to the number of CSID
129 sub-devices allows to create linear media controller pipelines when using two
135 Each VFE sub-device is linked to a separate video device node.
142 .. kernel-figure:: qcom_camss_graph.dot
148 .. kernel-figure:: qcom_camss_8x96_graph.dot
156 --------------
171 -------------
174 https://developer.qualcomm.com/download/sd410/snapdragon-410-processor-device-specification.pdf
175 Referenced 2016-11-24.
178 …ttps://developer.qualcomm.com/download/sd820e/qualcomm-snapdragon-820e-processor-apq8096sge-device…
179 Referenced 2018-06-22.
182 ----------
184 .. [#f1] https://git.codelinaro.org/clo/la/kernel/msm-3.10/
185 .. [#f2] https://git.codelinaro.org/clo/la/kernel/msm-3.18/