Lines Matching +full:multi +full:- +full:slot
1 .. SPDX-License-Identifier: GPL-2.0
8 :Authors: - Linas Vepstas <linasvepstas@gmail.com>
9 - Richard Lary <rlary@us.ibm.com>
10 - Mike Mason <mmlnx@us.ibm.com>
17 and the PCI-host bridges found on IBM Power4, Power5 and Power6-based
32 including multiple instances of a device driver on multi-function
34 waiting for some i/o-space register to change, when it never will.
39 is forced by the need to handle multi-function devices, that is,
42 of reset it desires, the choices being a simple re-enabling of I/O
43 or requesting a slot reset.
45 If any driver requests a slot reset, that is what will be done.
47 After a reset and/or a re-enabling of I/O, all drivers are
52 The biggest reason for choosing a kernel-based implementation rather
53 than a user-space implementation was the need to deal with bus
56 file system is disconnected, a user-space mechanism would have to go
62 for example, the SCSI-generic layer already provides significant
74 pci_driver. A driver that fails to provide the structure is "non-aware",
101 PCI_ERS_RESULT_CAN_RECOVER, /* Device driver can recover without slot reset */
102 PCI_ERS_RESULT_NEED_RESET, /* Device driver wants slot to be reset. */
116 event will be platform-dependent, but will follow the general
120 -------------------
121 A PCI bus error is detected by the PCI hardware. On powerpc, the slot
126 (PCIe r7.0 sec 6.2.11), the link to the sub-hierarchy with the
127 faulting device is disabled. Any device in the sub-hierarchy
131 --------------------
136 the platform (the slot will be isolated on powerpc). The driver may
148 - PCI_ERS_RESULT_RECOVERED
151 - PCI_ERS_RESULT_CAN_RECOVER
156 - PCI_ERS_RESULT_NEED_RESET
158 slot reset.
159 - PCI_ERS_RESULT_DISCONNECT
165 If all drivers on the segment/slot return PCI_ERS_RESULT_CAN_RECOVER,
166 then the platform should re-enable IOs on the slot (or do nothing in
170 If any driver requested a slot reset (by returning PCI_ERS_RESULT_NEED_RESET),
171 then recovery proceeds to STEP 4 (Slot Reset).
173 If the platform is unable to recover the slot, the next step
182 Doing better requires complex multi-threaded logic in the error
196 --------------------
197 The platform re-enables MMIO to the device (but typically not the
207 link reset was performed by the HW. If the platform can't just re-enable IOs
208 without a slot reset or a link reset, it will not call this callback, and
209 instead will have gone directly to STEP 3 (Link Reset) or STEP 4 (Slot Reset).
220 sub-hierarchy with the faulting device is re-enabled in STEP 3 (Link
221 Reset). Hence devices in the sub-hierarchy are inaccessible until
222 STEP 4 (Slot Reset).
225 may not even be accessible in STEP 4 (Slot Reset). Drivers can detect
236 such an error might cause IOs to be re-blocked for the whole
239 into one of the next states, that is, link reset or slot reset.
242 - PCI_ERS_RESULT_RECOVERED
249 slot reset on platforms that support it.
251 - PCI_ERS_RESULT_NEED_RESET
253 recoverable in its current state and it needs a slot
256 - PCI_ERS_RESULT_DISCONNECT
265 proceeds to STEP 4 (Slot Reset)
268 ------------------
273 STEP 4: Slot Reset
274 ------------------
277 platform will perform a slot reset on the requesting PCI device(s).
278 The actual steps taken by a platform to perform a slot reset
279 will be platform-dependent. Upon completion of slot reset, the
282 Powerpc platforms implement two levels of slot reset:
288 power-on followed by power-on BIOS/system firmware initialization.
289 Soft reset is also known as hot-reset.
301 performed by toggling the slot electrical power off/on.
305 a slot reset, the device driver will almost always use its standard
309 This call gives drivers the chance to re-initialize the hardware
310 (re-download firmware, etc.). At this point, the driver may assume
311 that the card is in a fresh state and is fully functional. The slot
313 memory mapped I/O space and DMA. Interrupts (Legacy, MSI, or MSI-X)
329 Drivers for multi-function cards will need to coordinate among
330 themselves as to which driver instance will perform any "one-shot"
334 + if (PCI_FUNC(pdev->devfn) == 0)
338 - PCI_ERS_RESULT_DISCONNECT
348 + pdev->needs_freset = 1;
356 The current powerpc implementation does not try a power-cycle
362 -------------------------
374 -------------------------
380 cancel all pending I/O, refuse all new I/O, returning -EIO to
386 permanent failure in some way. If the device is hotplug-capable,
389 caused by over-heating, some by a poorly seated card. Many
392 errors. See the discussion in Documentation/arch/powerpc/eeh-pci-error-recovery.rst
393 for additional detail on real-life experience of the causes of
398 ---------------------------
400 no slot reset capability may want to just "ignore" drivers that can't
410 - There is no guarantee that interrupt delivery can proceed from any
415 - There is no guarantee that interrupt delivery is stopped, that is,
422 interrupts are routed to error-management capable slots and can deal
432 the file Documentation/arch/powerpc/eeh-pci-error-recovery.rst
438 - drivers/scsi/ipr
439 - drivers/scsi/sym53c8xx_2
440 - drivers/scsi/qla2xxx
441 - drivers/scsi/lpfc
442 - drivers/next/bnx2.c
443 - drivers/next/e100.c
444 - drivers/net/e1000
445 - drivers/net/e1000e
446 - drivers/net/ixgbe
447 - drivers/net/cxgb3
448 - drivers/net/s2io.c
454 - drivers/cxl/pci.c
457 -------