Lines Matching +full:system +full:- +full:cache +full:- +full:controller

2 # NOTES -- Lines that can be cut/pasted into kernel and hints configs.
49 # parts of the system run faster.
61 # CPU_BLUELIGHTNING_3X enables triple-clock mode on IBM Blue Lightning
62 # CPU if CPU supports it.  The default is double-clock mode on
65 # CPU_BLUELIGHTNING_FPU_OP_CACHE enables FPU operand cache on IBM
75 # CPU_DIRECT_MAPPED_CACHE sets L1 cache of Cyrix 486DLC CPU in direct
76 # mapped mode.  Default is 2-way set associative mode.
95 # CPU_I486_ON_386 enables CPU cache on i486 based CPU upgrade products
102 # CPU_L2_LATENCY specifies the L2 cache latency value.  This option is used
110 # CPU_PPRO2CELERON enables L2 cache of Mendocino Celeron CPUs.  This option
112 # Pro BIOSs do not enable L2 cache of Mendocino Celeron CPUs.
121 # CPU_UPGRADE_HW_CACHE eliminates unneeded cache flush instruction(s).
124 # K5/K6/K6-2 CPUs.
126 # CYRIX_CACHE_WORKS enables CPU cache on Cyrix 486 CPUs with cache
129 # CYRIX_CACHE_REALLY_WORKS enables (1) CPU cache on Cyrix 486 CPUs
130 # without cache flush at hold state, and (2) write-back CPU cache on
136 # and should be included for any non-Pentium CPU that defines it.
139 # which indicates that the 15-16MB range is *definitely* not being
144 # These options may crash your system.
146 # NOTE 2: If CYRIX_CACHE_REALLY_WORKS is not set, CPU cache is enabled
147 # in write-through mode when revision < 2.7.  If revision of Cyrix
148 # 6x86 >= 2.7, CPU cache is always enabled in write-back mode.
189 # Hints for the non-optional Numeric Processing eXtension driver.
204 # Then copying and zeroing using the npx registers is normally 30-100% faster.
242 # sbni: Granch SBNI12-xx ISA and PCI adapters
244 # wpi:	Intel 3945ABG Wireless LAN controller
255 # Hint for the i386-only ISA front-end of le(4).
271 # smapi: System Management Application Program Interface driver
293 # glxiic: AMD Geode LX CS5536 System Management Bus
294 # pcf:	Philips PCF8584 ISA-bus controller
296 device		glxiic		# AMD Geode LX CS5536 System Management Bus
311 # Enable (32-bit) a.out binary support
334 # structures allocated before the VM system is initialized such as the