Lines Matching +full:on +full:- +full:device
2 # NOTES -- Lines that can be cut/pasted into kernel and hints configs.
15 # The apic device enables the use of the I/O APIC for interrupt delivery.
16 # The apic device can be used in both UP and SMP kernels, but is required
17 # for SMP kernels. Thus, the apic device is not strictly an SMP option,
32 # IPI_PREEMPTION instructs the kernel to preempt threads running on other
33 # CPUS if needed. Relies on the PREEMPTION option
36 device apic # I/O apic
47 # You must specify at least one CPU (the one you intend to run on);
61 # CPU_BLUELIGHTNING_3X enables triple-clock mode on IBM Blue Lightning
62 # CPU if CPU supports it. The default is double-clock mode on
65 # CPU_BLUELIGHTNING_FPU_OP_CACHE enables FPU operand cache on IBM
69 # CPU_BTB_EN enables branch target buffer on Cyrix 5x86 (NOTE 1).
76 # mapped mode. Default is 2-way set associative mode.
80 # I/O device(s).
95 # CPU_I486_ON_386 enables CPU cache on i486 based CPU upgrade products
99 # I/O clock delay time on Cyrix 5x86 and 6x86 are 0 and 7,respectively
107 # of a jump is already present in the prefetch buffer on Cyrix 5x86(NOTE
114 # CPU_RSTK_EN enables return stack on Cyrix 5x86 (NOTE 1).
118 # CPU_SUSP_HLT enables suspend on HALT. If this option is set, CPU
123 # CPU_WT_ALLOC enables write allocation on Cyrix 6x86/6x86MX and AMD
124 # K5/K6/K6-2 CPUs.
126 # CYRIX_CACHE_WORKS enables CPU cache on Cyrix 486 CPUs with cache
129 # CYRIX_CACHE_REALLY_WORKS enables (1) CPU cache on Cyrix 486 CPUs
130 # without cache flush at hold state, and (2) write-back CPU cache on
136 # and should be included for any non-Pentium CPU that defines it.
139 # which indicates that the 15-16MB range is *definitely* not being
147 # in write-through mode when revision < 2.7. If revision of Cyrix
148 # 6x86 >= 2.7, CPU cache is always enabled in write-back mode.
189 # Hints for the non-optional Numeric Processing eXtension driver.
204 # Then copying and zeroing using the npx registers is normally 30-100% faster.
214 # HARDWARE DEVICE CONFIGURATION
221 # the /dev/3dfx0 device to work with glide implementations. This should get
227 device tdfx # Enable 3Dfx Voodoo support
232 device pst
236 device aacraid # Container interface, CAM required
242 # sbni: Granch SBNI12-xx ISA and PCI adapters
255 # Hint for the i386-only ISA front-end of le(4).
260 device sbni
273 device smapi
290 # Requires 'device iicbus'.
294 # pcf: Philips PCF8584 ISA-bus controller
296 device glxiic # AMD Geode LX CS5536 System Management Bus
297 device pcf
304 # Requires 'device crypto'.
306 device glxsb # AMD Geode LX Security Block
311 # Enable (32-bit) a.out binary support
349 # Items broken on i386 that are generally available elsewhere
351 # Device uses bus_read_8 and friends, so can't work. Remove it from lint.