Lines Matching +full:hdr +full:- +full:engine

1 /*-
34 * Define common SLI-4 structures and function prototypes.
43 #define SLI_SUB_PAGE_MASK (SLI_PAGE_SIZE - 1)
53 uint32_t mask = page_size - 1; in sli_page_count()
93 * Common SLI-4 register offsets and field definitions
97 * @brief SLI_INTF - SLI Interface Definition Register
119 * @brief ASIC_ID - SLI ASIC Type and Revision Register
135 * @brief BMBX - Bootstrap Mailbox Register
150 * @brief EQCQ_DOORBELL - EQ and CQ Doorbell Register
168 * @brief SLIPORT_CONTROL - SLI Port Control Register
179 * @brief SLI4_SLIPORT_ERROR1 - SLI Port Error Register
184 * @brief SLI4_SLIPORT_ERROR2 - SLI Port Error Register
225 eq_doorbell->eq_id_lo = id & SLI4_EQCQ_EQ_ID_MASK_LO; in sli_eq_doorbell()
226 eq_doorbell->qt = 1; /* EQ is type 1 (section 2.2.3.3 SLI Arch) */ in sli_eq_doorbell()
227 eq_doorbell->eq_id_hi = (id >> 9) & 0x1f; in sli_eq_doorbell()
228 eq_doorbell->number_popped = n_popped; in sli_eq_doorbell()
229 eq_doorbell->arm = arm; in sli_eq_doorbell()
230 eq_doorbell->ci = TRUE; in sli_eq_doorbell()
252 cq_doorbell->cq_id_lo = id & SLI4_EQCQ_CQ_ID_MASK_LO; in sli_cq_doorbell()
253 cq_doorbell->qt = 0; /* CQ is type 0 (section 2.2.3.3 SLI Arch) */ in sli_cq_doorbell()
254 cq_doorbell->cq_id_hi = (id >> 10) & 0x1f; in sli_cq_doorbell()
255 cq_doorbell->number_popped = n_popped; in sli_cq_doorbell()
256 cq_doorbell->arm = arm; in sli_cq_doorbell()
277 eq_doorbell->eq_id = id; in sli_iftype6_eq_doorbell()
278 eq_doorbell->number_popped = n_popped; in sli_iftype6_eq_doorbell()
279 eq_doorbell->arm = arm; in sli_iftype6_eq_doorbell()
299 cq_doorbell->cq_id = id; in sli_iftype6_cq_doorbell()
300 cq_doorbell->number_popped = n_popped; in sli_iftype6_cq_doorbell()
301 cq_doorbell->arm = arm; in sli_iftype6_cq_doorbell()
307 * @brief MQ_DOORBELL - MQ Doorbell Register
318 * @brief RQ_DOORBELL - RQ Doorbell Register
329 * @brief WQ_DOORBELL - WQ Doorbell Register
343 * @brief SLIPORT_SEMAPHORE - SLI Port Host and Port Status Register
368 * @brief SLIPORT_STATUS - SLI Port Status Register
394 * SLI-4 mailbox command formats and definitions
468 #define SLI4_BDE_TYPE_BDE_64 0x00 /** Generic 64-bit data */
473 * @brief Scatter-Gather Entry (SGE)
489 * @brief T10 DIF Scatter-Gather Entry (SGE)
505 * @brief T10 DIF Seed Scatter-Gather Entry (SGE)
539 * @brief List Segment Pointer Scatter-Gather Entry (SGE)
571 #define SLI4_SGE_TYPE_PEDIF 0x06 /** Post Encryption Engine DIF */
572 #define SLI4_SGE_TYPE_PESEED 0x07 /** Post Encryption Engine DIF Seed */
584 sli4_mbox_command_header_t hdr; member
586 uint32_t maxbbc:8, /** Max buffer-to-buffer credit */
599 bbscn:4, /** buffer-to-buffer state change number */
612 sli4_mbox_command_header_t hdr; member
627 * @brief FW_INITIALIZE - initialize a SLI port
635 * @brief FW_DEINITIALIZE - deinitialize a SLI port
643 * @brief INIT_LINK - initialize the link for a FC/FCoE port
678 sli4_mbox_command_header_t hdr; member
711 * @brief INIT_VFI - initialize the VFI resource
714 sli4_mbox_command_header_t hdr; member
735 * @brief INIT_VPI - initialize the VPI resource
738 sli4_mbox_command_header_t hdr; member
748 * @brief POST_XRI - post XRI resources to the SLI Port
751 sli4_mbox_command_header_t hdr; member
765 * @brief RELEASE_XRI - Release XRI resources from the SLI Port
768 sli4_mbox_command_header_t hdr; member
784 * @brief READ_CONFIG - read SLI port configuration parameters
787 sli4_mbox_command_header_t hdr; member
791 sli4_mbox_command_header_t hdr; member
834 #define SLI4_READ_CFG_TOPO_FC_DA 0x2 /** FC Direct Attach (non FC-AL) topology */
835 #define SLI4_READ_CFG_TOPO_FC_AL 0x3 /** FC-AL topology */
838 * @brief READ_NVPARMS - read SLI port configuration parameters
841 sli4_mbox_command_header_t hdr; member
857 * @brief WRITE_NVPARMS - write SLI port configuration parameters
860 sli4_mbox_command_header_t hdr; member
876 * @brief READ_REV - read the Port revision levels
879 sli4_mbox_command_header_t hdr; member
914 * @brief READ_SPARM64 - read the Port service parameters
917 sli4_mbox_command_header_t hdr; member
954 * @brief READ_TOPOLOGY - read the link event information
957 sli4_mbox_command_header_t hdr; member
1011 * @brief REG_FCFI - activate a FC Forwarder
1015 sli4_mbox_command_header_t hdr; member
1043 sli4_mbox_command_header_t hdr; member
1074 * @brief REG_RPI - register a Remote Port Indicator
1077 sli4_mbox_command_header_t hdr; member
1099 * @brief REG_VFI - register a Virtual Fabric Indicator
1102 sli4_mbox_command_header_t hdr; member
1123 * @brief REG_VPI - register a Virtual Port Indicator
1126 sli4_mbox_command_header_t hdr; member
1142 * @brief REQUEST_FEATURES - request / query SLI features
1147 uint32_t iaab:1, /** inhibit auto-ABTS originator */
1156 iaar:1, /** inhibit auto-ABTS responder */
1173 sli4_mbox_command_header_t hdr; member
1185 * @brief SLI_CONFIG - submit a configuration command to Port
1199 sli4_mbox_command_header_t hdr; member
1219 * @brief READ_STATUS - read tx/rx status of a particular port
1224 sli4_mbox_command_header_t hdr; member
1250 * @brief READ_LNK_STAT - read link status of a particular port
1255 sli4_mbox_command_header_t hdr; member
1312 * PHWQ works by over-writing part of Word 10 in the WQE with the WQ ID.
1337 * @brief UNREG_FCFI - unregister a FCFI
1340 sli4_mbox_command_header_t hdr; member
1351 * @brief UNREG_RPI - unregister one or more RPI
1354 sli4_mbox_command_header_t hdr; member
1373 * @brief UNREG_VFI - unregister one or more VFI
1376 sli4_mbox_command_header_t hdr; member
1398 * @brief UNREG_VPI - unregister one or more VPI
1401 sli4_mbox_command_header_t hdr; member
1417 * @brief AUTO_XFER_RDY - Configure the auto-generate XFER-RDY feature.
1420 sli4_mbox_command_header_t hdr; member
1430 sli4_mbox_command_header_t hdr; member
1444 * SLI-4 common configuration command formats and definitions
1553 * Resets the Port, returning it to a power-on state. This configuration
1558 sli4_req_hdr_t hdr; member
1562 sli4_res_hdr_t hdr; member
1571 sli4_req_hdr_t hdr; member
1603 sli4_req_hdr_t hdr; member
1639 sli4_req_hdr_t hdr; member
1682 sli4_res_hdr_t hdr; member
1696 sli4_res_hdr_t hdr; member
1709 sli4_req_hdr_t hdr; member
1724 sli4_req_hdr_t hdr; member
1743 sli4_req_hdr_t hdr; member
1782 sli4_req_hdr_t hdr; member
1797 sli4_req_hdr_t hdr; member
1858 sli4_req_hdr_t hdr; member
1873 sli4_res_hdr_t hdr; member
1935 sli4_req_hdr_t hdr; member
1939 sli4_res_hdr_t hdr; member
1974 sli4_req_hdr_t hdr; member
1983 sli4_res_hdr_t hdr; member
1995 sli4_req_hdr_t hdr; member
2011 sli4_res_hdr_t hdr; member
2025 sli4_res_hdr_t hdr; member
2146 sli4_req_hdr_t hdr; member
2157 sli4_res_hdr_t hdr; member
2203 sli4_req_hdr_t hdr; member
2213 sli4_res_hdr_t hdr; member
2221 sli4_req_hdr_t hdr; member
2267 sli4_req_hdr_t hdr; member
2283 sli4_req_hdr_t hdr; member
2295 sli4_req_hdr_t hdr; member
2315 sli4_req_hdr_t hdr; member
2327 sli4_req_hdr_t hdr; member
2338 sli4_res_hdr_t hdr; member
2359 sli4_req_hdr_t hdr; member
2369 sli4_res_hdr_t hdr; member
2385 * by the SFF-8472 specification).
2388 sli4_req_hdr_t hdr; member
2398 sli4_res_hdr_t hdr; member
2413 sli4_req_hdr_t hdr; member
2427 sli4_res_hdr_t hdr; member
2441 sli4_req_hdr_t hdr; member
2457 sli4_res_hdr_t hdr; member
2471 sli4_req_hdr_t hdr; member
2485 sli4_req_hdr_t hdr; member
2502 sli4_req_hdr_t hdr; member
2517 sli4_res_hdr_t hdr; member
2545 sli4_req_hdr_t hdr; member
2576 agxfe:1, /*<< Auto Generate XFER-RDY Feature Enabled */
2634 sli4_req_hdr_t hdr; member
2648 sli4_res_hdr_t hdr; member
2739 sli4_req_hdr_t hdr; member
2743 sli4_res_hdr_t hdr; member
2756 sli4_req_hdr_t hdr; member
2763 sli4_res_hdr_t hdr; member
2776 sli4_req_hdr_t hdr; member
2785 sli4_res_hdr_t hdr; member
2817 sli4_req_hdr_t hdr; member
2827 sli4_res_hdr_t hdr; member
2840 sli4_req_hdr_t hdr; member
2844 sli4_res_hdr_t hdr; member
2859 sli4_req_hdr_t hdr; member
2870 sli4_res_hdr_t hdr; member
2892 sli4_req_hdr_t hdr; member
2900 sli4_res_hdr_t hdr; member
2917 sli4_req_hdr_t hdr; member
2928 sli4_res_hdr_t hdr; member
2936 sli4_req_hdr_t hdr; member
2947 sli4_res_hdr_t hdr; member
2984 con:1, /** consumed - command now being executed */
2985 cmp:1, /** completed - command still executing if clear */
2987 ae:1, /** async event - this is an ACQE */
2988 val:1; /** valid - contents of CQE are valid */
3006 ae:1, /** async event - this is an ACQE */
3007 val:1; /** valid - contents of CQE are valid */
3113 ocs_lock(&q->lock); in sli_queue_lock()
3119 ocs_unlock(&q->lock); in sli_queue_unlock()
3140 SLI_LINK_TOPO_NPORT = 1, /** fabric or point-to-point */
3303 /* Save pointer to physical memory descriptor for non-embedded SLI_CONFIG
3324 return sli4->config.extent[rsrc].size; in sli_get_max_rsrc()
3333 return sli4->config.max_qcount[qtype]; in sli_get_max_queue()
3340 return sli4->config.max_qentries[qtype]; in sli_get_max_qentries()
3346 return sli4->config.sge_supported_length; in sli_get_max_sge()
3353 if (sli4->config.sgl_page_sizes != 1) { in sli_get_max_sgl()
3354 ocs_log_test(sli4->os, "unsupported SGL page sizes %#x\n", in sli_get_max_sgl()
3355 sli4->config.sgl_page_sizes); in sli_get_max_sgl()
3359 return ((sli4->config.max_sgl_pages * SLI_PAGE_SIZE) / sizeof(sli4_sge_t)); in sli_get_max_sgl()
3365 switch (sli4->config.topology) { in sli_get_medium()
3380 sli4_sgl_chaining_params_t *cparms = &sli4->config.sgl_chaining_params; in sli_skh_chain_sge_build()
3383 sge->sge_type = SLI4_SGE_TYPE_CHAIN; in sli_skh_chain_sge_build()
3384 sge->buffer_address_high = (uint32_t)cparms->chain_sge_initial_value_hi; in sli_skh_chain_sge_build()
3385 sge->buffer_address_low = in sli_skh_chain_sge_build()
3386 (uint32_t)((cparms->chain_sge_initial_value_lo | in sli_skh_chain_sge_build()
3387 (((uintptr_t)(xri_index & cparms->sgl_index_field_mask)) << in sli_skh_chain_sge_build()
3388 cparms->sgl_index_field_offset) | in sli_skh_chain_sge_build()
3389 (((uintptr_t)(frag_num & cparms->frag_num_field_mask)) << in sli_skh_chain_sge_build()
3390 cparms->frag_num_field_offset) | in sli_skh_chain_sge_build()
3397 return sli4->sli_rev; in sli_get_sli_rev()
3403 return sli4->sli_family; in sli_get_sli_family()
3409 return sli4->if_type; in sli_get_if_type()
3415 return sli4->config.wwpn; in sli_get_wwn_port()
3421 return sli4->config.wwnn; in sli_get_wwn_node()
3427 return sli4->vpd.data.virt; in sli_get_vpd()
3433 return sli4->vpd.length; in sli_get_vpd_len()
3439 return sli4->config.fw_rev[which]; in sli_get_fw_revision()
3445 return sli4->config.fw_name[which]; in sli_get_fw_name()
3451 return sli4->config.ipl_name; in sli_get_ipl_name()
3457 return sli4->config.hw_rev[which]; in sli_get_hw_revision()
3463 return sli4->config.auto_xfer_rdy; in sli_get_auto_xfer_rdy_capable()
3469 return sli4->config.features.flag.dif; in sli_get_dif_capable()
3475 return sli_get_dif_capable(sli4) && sli4->config.t10_dif_inline_capable; in sli_is_dif_inline_capable()
3481 return sli_get_dif_capable(sli4) && sli4->config.t10_dif_separate_capable; in sli_is_dif_separate_capable()
3487 return sli4->config.dual_ulp_capable; in sli_get_is_dual_ulp_capable()
3493 return sli4->config.sgl_chaining_params.chaining_capable; in sli_get_is_sgl_chaining_capable()
3499 return sli4->config.is_ulp_fc[ulp]; in sli_get_is_ulp_enabled()
3505 return sli4->config.features.flag.hlm; in sli_get_hlm_capable()
3511 if (value && !sli4->config.features.flag.hlm) { in sli_set_hlm()
3512 ocs_log_test(sli4->os, "HLM not supported\n"); in sli_set_hlm()
3513 return -1; in sli_set_hlm()
3516 sli4->config.high_login_mode = value != 0 ? TRUE : FALSE; in sli_set_hlm()
3524 return sli4->config.high_login_mode; in sli_get_hlm()
3530 return sli4->config.sgl_pre_registration_required; in sli_get_sgl_preregister_required()
3536 return sli4->config.sgl_pre_registered; in sli_get_sgl_preregister()
3542 if ((value == 0) && sli4->config.sgl_pre_registration_required) { in sli_set_sgl_preregister()
3543 ocs_log_test(sli4->os, "SGL pre-registration required\n"); in sli_set_sgl_preregister()
3544 return -1; in sli_set_sgl_preregister()
3547 sli4->config.sgl_pre_registered = value != 0 ? TRUE : FALSE; in sli_set_sgl_preregister()
3555 return sli4->asic_type; in sli_get_asic_type()
3561 return sli4->asic_rev; in sli_get_asic_rev()
3574 sli4->config.topology = value; in sli_set_topology()
3577 ocs_log_test(sli4->os, "unsupported topology %#x\n", value); in sli_set_topology()
3578 rc = -1; in sli_set_topology()
3587 sli4->config.pt = req->persistent_topo; in sli_config_persistent_topology()
3588 sli4->config.tf = req->topo_failover; in sli_config_persistent_topology()
3594 return sli4->config.link_module_type; in sli_get_link_module_type()
3600 return sli4->config.port_name; in sli_get_portnum()
3606 return sli4->config.bios_version_string; in sli_get_bios_version_string()
3630 ocs_log_err(NULL, "unsupported FC-AL speed (speed_code: %d)\n", link_speed); in sli_fcal_is_speed_supported()
3782 * The SLI-4 specification uses a 16 bit field in most places for the FCF
3789 * SLI-4 FC/FCoE mailbox command formats and definitions.
3820 sli4_req_hdr_t hdr; member
3842 sli4_req_hdr_t hdr; member
3865 sli4_req_hdr_t hdr; member
3880 sli4_req_hdr_t hdr; member
3901 sli4_req_hdr_t hdr; member
3931 sli4_req_hdr_t hdr; member
3958 sli4_req_hdr_t hdr; member
4005 sli4_req_hdr_t hdr; member
4021 sli4_req_hdr_t hdr; member
4030 /* A FCF index of -1 on the request means return the first valid entry */
4065 sli4_res_hdr_t hdr; member
4076 /* A next FCF index of -1 in the response means this is the last valid entry */
4083 sli4_req_hdr_t hdr; member
4099 sli4_req_hdr_t hdr; member
4534 * T10-PI workaround, the secondary xri tag
5178 ae:1, /** async event - this is an ACQE */
5179 val:1; /** valid - contents of CQE are valid */
5221 ae:1, /** async event - this is an ACQE */
5222 val:1; /** valid - contents of CQE are valid */
5273 ae:1, /** async event - this is an ACQE */
5274 val:1; /** valid - contents of CQE are valid */
5599 …t sli_send_frame_wqe(sli4_t *sli4, void *buf, size_t size, uint8_t sof, uint8_t eof, uint32_t *hdr,
5620 * @return Returns 0 on success, or a non-zero value on failure.
5629 if (SLI4_FC_ASYNC_RQ_SUCCESS == rcqe->status) { in sli_fc_rqe_length()
5630 *len_hdr = rcqe->header_data_placement_length; in sli_fc_rqe_length()
5631 *len_data = rcqe->payload_data_placement_length; in sli_fc_rqe_length()
5634 return -1; in sli_fc_rqe_length()
5656 fcfi = rcqe->fcfi; in sli_fc_rqe_fcfi()
5661 fcfi = rcqev1->fcfi; in sli_fc_rqe_fcfi()
5666 fcfi = opt_wr->fcfi; in sli_fc_rqe_fcfi()