Lines Matching +full:no +full:- +full:hw +full:- +full:checksum
1 /*-
4 * SPDX-License-Identifier: BSD-3-Clause
10 static void igc_reload_nvm_generic(struct igc_hw *hw);
13 * igc_init_nvm_ops_generic - Initialize NVM function pointers
14 * @hw: pointer to the HW structure
16 * Setups up the function pointers to no-op functions
18 void igc_init_nvm_ops_generic(struct igc_hw *hw) in igc_init_nvm_ops_generic() argument
20 struct igc_nvm_info *nvm = &hw->nvm; in igc_init_nvm_ops_generic()
24 nvm->ops.init_params = igc_null_ops_generic; in igc_init_nvm_ops_generic()
25 nvm->ops.acquire = igc_null_ops_generic; in igc_init_nvm_ops_generic()
26 nvm->ops.read = igc_null_read_nvm; in igc_init_nvm_ops_generic()
27 nvm->ops.release = igc_null_nvm_generic; in igc_init_nvm_ops_generic()
28 nvm->ops.reload = igc_reload_nvm_generic; in igc_init_nvm_ops_generic()
29 nvm->ops.update = igc_null_ops_generic; in igc_init_nvm_ops_generic()
30 nvm->ops.validate = igc_null_ops_generic; in igc_init_nvm_ops_generic()
31 nvm->ops.write = igc_null_write_nvm; in igc_init_nvm_ops_generic()
35 * igc_null_nvm_read - No-op function, return 0
36 * @hw: pointer to the HW structure
41 s32 igc_null_read_nvm(struct igc_hw IGC_UNUSEDARG *hw, in igc_null_read_nvm() argument
50 * igc_null_nvm_generic - No-op function, return void
51 * @hw: pointer to the HW structure
53 void igc_null_nvm_generic(struct igc_hw IGC_UNUSEDARG *hw) in igc_null_nvm_generic() argument
60 * igc_null_write_nvm - No-op function, return 0
61 * @hw: pointer to the HW structure
66 s32 igc_null_write_nvm(struct igc_hw IGC_UNUSEDARG *hw, in igc_null_write_nvm() argument
75 * igc_raise_eec_clk - Raise EEPROM clock
76 * @hw: pointer to the HW structure
81 static void igc_raise_eec_clk(struct igc_hw *hw, u32 *eecd) in igc_raise_eec_clk() argument
84 IGC_WRITE_REG(hw, IGC_EECD, *eecd); in igc_raise_eec_clk()
85 IGC_WRITE_FLUSH(hw); in igc_raise_eec_clk()
86 usec_delay(hw->nvm.delay_usec); in igc_raise_eec_clk()
90 * igc_lower_eec_clk - Lower EEPROM clock
91 * @hw: pointer to the HW structure
96 static void igc_lower_eec_clk(struct igc_hw *hw, u32 *eecd) in igc_lower_eec_clk() argument
99 IGC_WRITE_REG(hw, IGC_EECD, *eecd); in igc_lower_eec_clk()
100 IGC_WRITE_FLUSH(hw); in igc_lower_eec_clk()
101 usec_delay(hw->nvm.delay_usec); in igc_lower_eec_clk()
105 * igc_shift_out_eec_bits - Shift data bits our to the EEPROM
106 * @hw: pointer to the HW structure
114 static void igc_shift_out_eec_bits(struct igc_hw *hw, u16 data, u16 count) in igc_shift_out_eec_bits() argument
116 struct igc_nvm_info *nvm = &hw->nvm; in igc_shift_out_eec_bits()
117 u32 eecd = IGC_READ_REG(hw, IGC_EECD); in igc_shift_out_eec_bits()
122 mask = 0x01 << (count - 1); in igc_shift_out_eec_bits()
123 if (nvm->type == igc_nvm_eeprom_spi) in igc_shift_out_eec_bits()
132 IGC_WRITE_REG(hw, IGC_EECD, eecd); in igc_shift_out_eec_bits()
133 IGC_WRITE_FLUSH(hw); in igc_shift_out_eec_bits()
135 usec_delay(nvm->delay_usec); in igc_shift_out_eec_bits()
137 igc_raise_eec_clk(hw, &eecd); in igc_shift_out_eec_bits()
138 igc_lower_eec_clk(hw, &eecd); in igc_shift_out_eec_bits()
144 IGC_WRITE_REG(hw, IGC_EECD, eecd); in igc_shift_out_eec_bits()
148 * igc_shift_in_eec_bits - Shift data bits in from the EEPROM
149 * @hw: pointer to the HW structure
158 static u16 igc_shift_in_eec_bits(struct igc_hw *hw, u16 count) in igc_shift_in_eec_bits() argument
166 eecd = IGC_READ_REG(hw, IGC_EECD); in igc_shift_in_eec_bits()
173 igc_raise_eec_clk(hw, &eecd); in igc_shift_in_eec_bits()
175 eecd = IGC_READ_REG(hw, IGC_EECD); in igc_shift_in_eec_bits()
181 igc_lower_eec_clk(hw, &eecd); in igc_shift_in_eec_bits()
188 * igc_poll_eerd_eewr_done - Poll for EEPROM read/write completion
189 * @hw: pointer to the HW structure
195 s32 igc_poll_eerd_eewr_done(struct igc_hw *hw, int ee_reg) in igc_poll_eerd_eewr_done() argument
204 reg = IGC_READ_REG(hw, IGC_EERD); in igc_poll_eerd_eewr_done()
206 reg = IGC_READ_REG(hw, IGC_EEWR); in igc_poll_eerd_eewr_done()
214 return -IGC_ERR_NVM; in igc_poll_eerd_eewr_done()
218 * igc_acquire_nvm_generic - Generic request for access to EEPROM
219 * @hw: pointer to the HW structure
223 * EEPROM access and return -IGC_ERR_NVM (-1).
225 s32 igc_acquire_nvm_generic(struct igc_hw *hw) in igc_acquire_nvm_generic() argument
227 u32 eecd = IGC_READ_REG(hw, IGC_EECD); in igc_acquire_nvm_generic()
232 IGC_WRITE_REG(hw, IGC_EECD, eecd | IGC_EECD_REQ); in igc_acquire_nvm_generic()
233 eecd = IGC_READ_REG(hw, IGC_EECD); in igc_acquire_nvm_generic()
239 eecd = IGC_READ_REG(hw, IGC_EECD); in igc_acquire_nvm_generic()
240 timeout--; in igc_acquire_nvm_generic()
245 IGC_WRITE_REG(hw, IGC_EECD, eecd); in igc_acquire_nvm_generic()
247 return -IGC_ERR_NVM; in igc_acquire_nvm_generic()
254 * igc_standby_nvm - Return EEPROM to standby state
255 * @hw: pointer to the HW structure
259 static void igc_standby_nvm(struct igc_hw *hw) in igc_standby_nvm() argument
261 struct igc_nvm_info *nvm = &hw->nvm; in igc_standby_nvm()
262 u32 eecd = IGC_READ_REG(hw, IGC_EECD); in igc_standby_nvm()
266 if (nvm->type == igc_nvm_eeprom_spi) { in igc_standby_nvm()
269 IGC_WRITE_REG(hw, IGC_EECD, eecd); in igc_standby_nvm()
270 IGC_WRITE_FLUSH(hw); in igc_standby_nvm()
271 usec_delay(nvm->delay_usec); in igc_standby_nvm()
273 IGC_WRITE_REG(hw, IGC_EECD, eecd); in igc_standby_nvm()
274 IGC_WRITE_FLUSH(hw); in igc_standby_nvm()
275 usec_delay(nvm->delay_usec); in igc_standby_nvm()
280 * igc_stop_nvm - Terminate EEPROM command
281 * @hw: pointer to the HW structure
285 static void igc_stop_nvm(struct igc_hw *hw) in igc_stop_nvm() argument
291 eecd = IGC_READ_REG(hw, IGC_EECD); in igc_stop_nvm()
292 if (hw->nvm.type == igc_nvm_eeprom_spi) { in igc_stop_nvm()
295 igc_lower_eec_clk(hw, &eecd); in igc_stop_nvm()
300 * igc_release_nvm_generic - Release exclusive access to EEPROM
301 * @hw: pointer to the HW structure
305 void igc_release_nvm_generic(struct igc_hw *hw) in igc_release_nvm_generic() argument
311 igc_stop_nvm(hw); in igc_release_nvm_generic()
313 eecd = IGC_READ_REG(hw, IGC_EECD); in igc_release_nvm_generic()
315 IGC_WRITE_REG(hw, IGC_EECD, eecd); in igc_release_nvm_generic()
319 * igc_ready_nvm_eeprom - Prepares EEPROM for read/write
320 * @hw: pointer to the HW structure
324 static s32 igc_ready_nvm_eeprom(struct igc_hw *hw) in igc_ready_nvm_eeprom() argument
326 struct igc_nvm_info *nvm = &hw->nvm; in igc_ready_nvm_eeprom()
327 u32 eecd = IGC_READ_REG(hw, IGC_EECD); in igc_ready_nvm_eeprom()
332 if (nvm->type == igc_nvm_eeprom_spi) { in igc_ready_nvm_eeprom()
337 IGC_WRITE_REG(hw, IGC_EECD, eecd); in igc_ready_nvm_eeprom()
338 IGC_WRITE_FLUSH(hw); in igc_ready_nvm_eeprom()
347 igc_shift_out_eec_bits(hw, NVM_RDSR_OPCODE_SPI, in igc_ready_nvm_eeprom()
348 hw->nvm.opcode_bits); in igc_ready_nvm_eeprom()
349 spi_stat_reg = (u8)igc_shift_in_eec_bits(hw, 8); in igc_ready_nvm_eeprom()
354 igc_standby_nvm(hw); in igc_ready_nvm_eeprom()
355 timeout--; in igc_ready_nvm_eeprom()
360 return -IGC_ERR_NVM; in igc_ready_nvm_eeprom()
368 * igc_read_nvm_eerd - Reads EEPROM using EERD register
369 * @hw: pointer to the HW structure
376 s32 igc_read_nvm_eerd(struct igc_hw *hw, u16 offset, u16 words, u16 *data) in igc_read_nvm_eerd() argument
378 struct igc_nvm_info *nvm = &hw->nvm; in igc_read_nvm_eerd()
387 if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) || in igc_read_nvm_eerd()
390 return -IGC_ERR_NVM; in igc_read_nvm_eerd()
397 IGC_WRITE_REG(hw, IGC_EERD, eerd); in igc_read_nvm_eerd()
398 ret_val = igc_poll_eerd_eewr_done(hw, IGC_NVM_POLL_READ); in igc_read_nvm_eerd()
402 data[i] = (IGC_READ_REG(hw, IGC_EERD) >> in igc_read_nvm_eerd()
413 * igc_write_nvm_spi - Write to EEPROM using SPI
414 * @hw: pointer to the HW structure
422 * EEPROM will most likely contain an invalid checksum.
424 s32 igc_write_nvm_spi(struct igc_hw *hw, u16 offset, u16 words, u16 *data) in igc_write_nvm_spi() argument
426 struct igc_nvm_info *nvm = &hw->nvm; in igc_write_nvm_spi()
427 s32 ret_val = -IGC_ERR_NVM; in igc_write_nvm_spi()
435 if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) || in igc_write_nvm_spi()
438 return -IGC_ERR_NVM; in igc_write_nvm_spi()
444 ret_val = nvm->ops.acquire(hw); in igc_write_nvm_spi()
448 ret_val = igc_ready_nvm_eeprom(hw); in igc_write_nvm_spi()
450 nvm->ops.release(hw); in igc_write_nvm_spi()
454 igc_standby_nvm(hw); in igc_write_nvm_spi()
457 igc_shift_out_eec_bits(hw, NVM_WREN_OPCODE_SPI, in igc_write_nvm_spi()
458 nvm->opcode_bits); in igc_write_nvm_spi()
460 igc_standby_nvm(hw); in igc_write_nvm_spi()
465 if ((nvm->address_bits == 8) && (offset >= 128)) in igc_write_nvm_spi()
468 /* Send the Write command (8-bit opcode + addr) */ in igc_write_nvm_spi()
469 igc_shift_out_eec_bits(hw, write_opcode, nvm->opcode_bits); in igc_write_nvm_spi()
470 igc_shift_out_eec_bits(hw, (u16)((offset + widx) * 2), in igc_write_nvm_spi()
471 nvm->address_bits); in igc_write_nvm_spi()
477 igc_shift_out_eec_bits(hw, word_out, 16); in igc_write_nvm_spi()
480 if ((((offset + widx) * 2) % nvm->page_size) == 0) { in igc_write_nvm_spi()
481 igc_standby_nvm(hw); in igc_write_nvm_spi()
486 nvm->ops.release(hw); in igc_write_nvm_spi()
493 * igc_read_pba_string_generic - Read device part number
494 * @hw: pointer to the HW structure
501 s32 igc_read_pba_string_generic(struct igc_hw *hw, u8 *pba_num, in igc_read_pba_string_generic() argument
514 return -IGC_ERR_INVALID_ARGUMENT; in igc_read_pba_string_generic()
517 ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_0, 1, &nvm_data); in igc_read_pba_string_generic()
523 ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_1, 1, &pba_ptr); in igc_read_pba_string_generic()
549 pba_num[6] = '-'; in igc_read_pba_string_generic()
557 /* switch all the data but the '-' to hex char */ in igc_read_pba_string_generic()
562 pba_num[offset] += 'A' - 0xA; in igc_read_pba_string_generic()
568 ret_val = hw->nvm.ops.read(hw, pba_ptr, 1, &length); in igc_read_pba_string_generic()
576 return -IGC_ERR_NVM_PBA_SECTION; in igc_read_pba_string_generic()
579 if (pba_num_size < (((u32)length * 2) - 1)) { in igc_read_pba_string_generic()
581 return -IGC_ERR_NO_SPACE; in igc_read_pba_string_generic()
586 length--; in igc_read_pba_string_generic()
589 ret_val = hw->nvm.ops.read(hw, pba_ptr + offset, 1, &nvm_data); in igc_read_pba_string_generic()
607 * igc_read_mac_addr_generic - Read device MAC address
608 * @hw: pointer to the HW structure
614 s32 igc_read_mac_addr_generic(struct igc_hw *hw) in igc_read_mac_addr_generic() argument
620 rar_high = IGC_READ_REG(hw, IGC_RAH(0)); in igc_read_mac_addr_generic()
621 rar_low = IGC_READ_REG(hw, IGC_RAL(0)); in igc_read_mac_addr_generic()
624 hw->mac.perm_addr[i] = (u8)(rar_low >> (i*8)); in igc_read_mac_addr_generic()
627 hw->mac.perm_addr[i+4] = (u8)(rar_high >> (i*8)); in igc_read_mac_addr_generic()
630 hw->mac.addr[i] = hw->mac.perm_addr[i]; in igc_read_mac_addr_generic()
636 * igc_validate_nvm_checksum_generic - Validate EEPROM checksum
637 * @hw: pointer to the HW structure
639 * Calculates the EEPROM checksum by reading/adding each word of the EEPROM
642 s32 igc_validate_nvm_checksum_generic(struct igc_hw *hw) in igc_validate_nvm_checksum_generic() argument
645 u16 checksum = 0; in igc_validate_nvm_checksum_generic() local
651 ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data); in igc_validate_nvm_checksum_generic()
656 checksum += nvm_data; in igc_validate_nvm_checksum_generic()
659 if (checksum != (u16) NVM_SUM) { in igc_validate_nvm_checksum_generic()
660 DEBUGOUT("NVM Checksum Invalid\n"); in igc_validate_nvm_checksum_generic()
661 return -IGC_ERR_NVM; in igc_validate_nvm_checksum_generic()
668 * igc_update_nvm_checksum_generic - Update EEPROM checksum
669 * @hw: pointer to the HW structure
671 * Updates the EEPROM checksum by reading/adding each word of the EEPROM
672 * up to the checksum. Then calculates the EEPROM checksum and writes the
675 s32 igc_update_nvm_checksum_generic(struct igc_hw *hw) in igc_update_nvm_checksum_generic() argument
678 u16 checksum = 0; in igc_update_nvm_checksum_generic() local
684 ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data); in igc_update_nvm_checksum_generic()
686 DEBUGOUT("NVM Read Error while updating checksum.\n"); in igc_update_nvm_checksum_generic()
689 checksum += nvm_data; in igc_update_nvm_checksum_generic()
691 checksum = (u16) NVM_SUM - checksum; in igc_update_nvm_checksum_generic()
692 ret_val = hw->nvm.ops.write(hw, NVM_CHECKSUM_REG, 1, &checksum); in igc_update_nvm_checksum_generic()
694 DEBUGOUT("NVM Write Error while updating checksum.\n"); in igc_update_nvm_checksum_generic()
700 * igc_reload_nvm_generic - Reloads EEPROM
701 * @hw: pointer to the HW structure
706 static void igc_reload_nvm_generic(struct igc_hw *hw) in igc_reload_nvm_generic() argument
713 ctrl_ext = IGC_READ_REG(hw, IGC_CTRL_EXT); in igc_reload_nvm_generic()
715 IGC_WRITE_REG(hw, IGC_CTRL_EXT, ctrl_ext); in igc_reload_nvm_generic()
716 IGC_WRITE_FLUSH(hw); in igc_reload_nvm_generic()
720 * igc_get_fw_version - Get firmware version information
721 * @hw: pointer to the HW structure
726 void igc_get_fw_version(struct igc_hw *hw, struct igc_fw_version *fw_vers) in igc_get_fw_version() argument
738 switch (hw->mac.type) { in igc_get_fw_version()
740 hw->nvm.ops.read(hw, NVM_ETRACK_HIWORD, 1, &etrack_test); in igc_get_fw_version()
742 hw->nvm.ops.read(hw, NVM_COMB_VER_PTR, 1, &comb_offset); in igc_get_fw_version()
744 hw->nvm.ops.read(hw, NVM_COMB_VER_OFF + comb_offset + 1, in igc_get_fw_version()
746 hw->nvm.ops.read(hw, NVM_COMB_VER_OFF + comb_offset, in igc_get_fw_version()
753 fw_vers->or_valid = true; in igc_get_fw_version()
754 fw_vers->or_major = comb_verl >> in igc_get_fw_version()
756 fw_vers->or_build = (comb_verl << in igc_get_fw_version()
760 fw_vers->or_patch = comb_verh & in igc_get_fw_version()
766 hw->nvm.ops.read(hw, NVM_ETRACK_HIWORD, 1, &etrack_test); in igc_get_fw_version()
769 hw->nvm.ops.read(hw, NVM_VERSION, 1, &fw_version); in igc_get_fw_version()
770 fw_vers->eep_major = (fw_version & NVM_MAJOR_MASK) in igc_get_fw_version()
787 fw_vers->eep_minor = result; in igc_get_fw_version()
790 hw->nvm.ops.read(hw, NVM_ETRACK_WORD, 1, &eeprom_verl); in igc_get_fw_version()
791 hw->nvm.ops.read(hw, (NVM_ETRACK_WORD + 1), 1, &eeprom_verh); in igc_get_fw_version()
792 fw_vers->etrack_id = (eeprom_verh << NVM_ETRACK_SHIFT) in igc_get_fw_version()
795 hw->nvm.ops.read(hw, NVM_ETRACK_WORD, 1, &eeprom_verh); in igc_get_fw_version()
796 hw->nvm.ops.read(hw, (NVM_ETRACK_WORD + 1), 1, &eeprom_verl); in igc_get_fw_version()
797 fw_vers->etrack_id = (eeprom_verh << NVM_ETRACK_SHIFT) | in igc_get_fw_version()